ClassID:

206989

H01L21/0203 - CPC Classification

Classification description:

Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof; Manufacture or treatment of semiconductor devices or of parts thereof; Preparing wafers; Preparing bulk and homogeneous wafers Making porous regions on the surface

Recent Application in this class:
#1
20250183031
2025-06-05

METHOD OF PROCESSING A SEMICONDUCTOR WAFER

#2
20240153759
2024-05-09

SEMICONDUCTOR DEVICE WITH A POROUS PORTION, WAFER COMPOSITE AND METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE

#3
20230411152
2023-12-21

Substrate For Epitaxial Growth, Manufacturing Method of the Same, Semiconductor Device Including the Same and Manufacturing Method Using the Same

#4
20230221282
2023-07-13

METHOD FOR DETECTING ANALYTES

#5
20230127556
2023-04-27

Manufacturing and reuse of semiconductor substrates

#6
20230011018
2023-01-12

METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE

#7
20220359194
2022-11-10

Semiconductor device with a porous portion, wafer composite and method of manufacturing a semiconductor device

#8
20220310380
2022-09-29

Method of porosifying part of a semiconductor wafer

#9
20200411324
2020-12-31

Method of electrochemically processing a substrate and integrated circuit device

#10
20200381258
2020-12-03

BIASED PULSE CMP GROOVE PATTERN

#11
20200365385
2020-11-19

Semiconductor surface smoothing and semiconductor arrangement

#12
20200286730
2020-09-10

Semiconductor device with a porous portion, wafer composite and method of manufacturing a semiconductor device

#13
20200273717
2020-08-27

Direct growth methods for preparing diamond-assisted heat-dissipation silicon carbide substrates of GaN-HEMTs

#14
20200168449
2020-05-28

Method for partially removing a semiconductor wafer

#15
20200083021
2020-03-12

Foam in ion implantation system

#16
20190131454
2019-05-02

SEMICONDUCTOR DEVICE WITH STRAINED SILICON LAYERS ON POROUS SILICON

#17
20180366333
2018-12-20

Biased pulse CMP groove pattern

#18
20180366332
2018-12-20

Controlled residence CMP polishing method

#19
20180366331
2018-12-20

Uniform CMP polishing method

#20
20180323087
2018-11-08

High-throughput batch porous silicon manufacturing equipment design and processing methods

#21
20180277632
2018-09-27

Porous semiconductor handle substrate

#22
20180269052
2018-09-20

Detection of analytes using porous mass spectrometry surface

#23
20180130929
2018-05-10

Display device with reduced warping and method for fabricating the same

#24
20180076341
2018-03-15

Silicon-containing semiconductor structures, methods of making the same and devices including the same

#25
20180047614
2018-02-15

Thermally stable charge trapping layer for use in manufacture of semiconductor-on-insulator structures

#26
20170326689
2017-11-16

METHODS OF FORMING A SUBSTRATE HAVING AN OPEN PORE THEREIN AND PRODUCTS FORMED THEREBY

#27
20170243767
2017-08-24

HIGH-THROUGHPUT BATCH POROUS SILICON MANUFACTURING EQUIPMENT DESIGN AND PROCESSING METHODS

#28
20160186358
2016-06-30

High-throughput batch porous silicon manufacturing equipment design and processing methods

#29
20160064206
2016-03-03

Method for processing an oxygen containing semiconductor body

#30
20150090606
2015-04-02

Enhanced porosification

#31
20150090605
2015-04-02

Electro-polishing and porosification

#32
20140151854
2014-06-05

Method for Separating a Layer and a Chip Formed on a Layer

#33
20130291925
2013-11-07

Solar cell wafer and method of producing the same

#34
20130180847
2013-07-18

High-Throughput batch porous silicon manufacturing equipment design and processing methods

#35
20120088372
2012-04-12

METHOD OF FORMING MICRO-PORE STRUCTURES OR TRENCH STRUCTURES ON SURFACE OF SILICON WAFER SUBSTRATE

#36
20110266655
2011-11-03

Semiconductor substrate having multilayer film and method to reuse the substrate by delaminating a porous layer

#37
20080179712
2008-07-31

Structure and method to form semiconductor-on-pores (SOP) for high device performance and low manufacturing cost

#38
20080166538
2008-07-10

Porous silicon and method of preparing the same

#39
20070269167
2007-11-22

Multi-channel optical receiver module

#40
20070164358
2007-07-19

Structure and method to form semiconductor-on-pores (SOP) for high device performance and low manufacturing cost

#41
20070141813
2007-06-21

Method of fabricating multi-freestanding GaN wafer

#42
20050133865
2005-06-23

Member which includes porous silicon region, and method of manufacturing member which contains silicon