ClassID:

207056

H01L21/02367 - CPC Classification

Classification description:

Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof; Manufacture or treatment of semiconductor devices or of parts thereof; Forming layers; Forming inorganic semiconducting materials on a substrate Substrates

Sub-classes:
Recent Application in this class:
#1
20240014027
2024-01-11

Method for manufacturing a substrate

#2
20220043271
2022-02-10

LIGHT EMITTING DISPLAY

#3
20210191201
2021-06-24

Display panel and manufacture method thereof, and display apparatus

#4
20210066063
2021-03-04

Method for manufacturing a substrate

#5
20200350343
2020-11-05

Method of transferring a thin film from a substrate to a flexible support

#6
20200258741
2020-08-13

Multi-deposition process for high quality gallium nitride device manufacturing

#7
20200176305
2020-06-04

Group III nitride composite substrate and method for manufacturing the same, and method for manufacturing group III nitride semiconductor device

#8
20200142248
2020-05-07

Display panel

#9
20200091218
2020-03-19

Semiconductor device with insulating layers forming a bonding plane between first and second circuit components, method of manufacturing the same, and electronic device

#10
20200091089
2020-03-19

Silicon wafer manufacturing method

#11
20190346680
2019-11-14

Light emitting display

#12
20190088462
2019-03-21

Method for manufacturing a substrate

#13
20190011061
2019-01-10

Bidirectional gate valve

#14
20180005827
2018-01-04

Multi-deposition process for high quality gallium nitride device manufacturing

#15
20160056262
2016-02-25

Metal gate and manufuacturing process thereof

#16
20150287645
2015-10-08

Integrated circuits having a plurality of high-K metal gate FETs with various combinations of channel foundation structure and gate stack structure and methods of making same

#17
20150060874
2015-03-05

Flexible electric device and method of manufacturing the same

#18
20140370628
2014-12-18

Substrate processing apparatus, semiconductor device manufacturing method, substrate processing method, and recording medium

#19
20140256116
2014-09-11

Semiconductor device and manufacturing method thereof

#20
20140159052
2014-06-12

METHOD AND STRUCTURE FOR TRANSISTOR WITH REDUCED DRAIN-INDUCED BARRIER LOWERING AND ON RESISTANCE

#21
20140151802
2014-06-05

Semiconductor device having SSOI substrate with relaxed tensile stress

#22
20140131771
2014-05-15

Semiconductor structure including a semiconductor-on-insulator region and a bulk region, and method for the formation thereof

#23
20140120660
2014-05-01

Semiconductor device and method for manufacturing the same

#24
20130175490
2013-07-11

Nonvolatile semiconductor memory device and method of manufacturing the same

#25
20130075745
2013-03-28

Thin-film semiconductor device, display apparatus, and method for manufacturing thin-film semiconductor device

#26
20120043580
2012-02-23

Semiconductor device and manufacturing method thereof

#27
20120018727
2012-01-26

Semiconductor device and method for manufacturing

#28
20110073874
2011-03-31

Method of reducing memory effects in semiconductor epitaxy

#29
20100176490
2010-07-15

Methods of forming relaxed layers of semiconductor materials, semiconductor structures, devices and engineered substrates including same

#30
20090142869
2009-06-04

Method of producing semiconductor optical device

#31
20090117679
2009-05-07

Methods for forming crystalline thin-film photovoltaic structures

#32
20090114274
2009-05-07

CRYSTALLINE THIN-FILM PHOTOVOLTAIC STRUCTURES

#33
20090035922
2009-02-05

Semiconductor device and manufacturing method thereof

#34
20070048980
2007-03-01

METHOD FOR POST-RIE PASSIVATION OF SEMICONDUCTOR SURFACES FOR EPITAXIAL GROWTH

#35
20050142876
2005-06-30

Maskless lateral epitaxial overgrowth of aluminum nitride and high aluminum composition aluminum gallium nitride

#36
20050092996
2005-05-05

Semiconductor device and manufacturing method thereof

#37
13755887
2015-07-28

Integrated circuits having a plurality of high-K metal gate FETs with various combinations of channel foundation structure and gate stack structure and methods of making same