ClassID:

207185

H01L21/2205 - CPC Classification

Classification description:

Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof; Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AB compounds with or without impurities, e.g. doping materials; Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities from the substrate during epitaxy, e.g. autodoping; Preventing or using autodoping

Recent Application in this class:
#1
20250194193
2025-06-12

ARSENIC DIFFUSION PROFILE ENGINEERING FOR TRANSISTORS

#2
20220320294
2022-10-06

Arsenic diffusion profile engineering for transistors

#3
20220148925
2022-05-12

Wafer evaluation method

#4
20220122969
2022-04-21

Bipolar transistor and manufacturing method

#5
20200313009
2020-10-01

Solar cell and solar cell module

#6
20190355816
2019-11-21

Semiconductor device source/drain region with arsenic-containing barrier region

#7
20190088482
2019-03-21

Doping method

#8
20180308697
2018-10-25

Semiconductor substrate and manufacturing method of the same

#9
20180240714
2018-08-23

Dual channel FinFETs having uniform fin heights

#10
20180240713
2018-08-23

Dual channel FinFETs having uniform fin heights

#11
20180076313
2018-03-15

Semiconductor device and method of manufacturing the semiconductor device

#12
20180061962
2018-03-01

Method for producing a doped semiconductor layer

#13
20170133538
2017-05-11

Method of producing differently doped zones in a silicon substrate, in particular for a solar cell

#14
20160329463
2016-11-10

System and method for providing an electron blocking layer with doping control

#15
20160225622
2016-08-04

System and method for substrate wafer back side and edge cross section seals

#16
20150349059
2015-12-03

Semiconductor arrangement and formation thereof

#17
20150200088
2015-07-16

Fabrication method of semiconductor memory device

#18
20150145032
2015-05-28

Field-effect transistor and method for the fabrication thereof

#19
20150114282
2015-04-30

Epitaxial growth method

#20
20150107511
2015-04-23

Epitaxial growth method

#21
20150048310
2015-02-19

System and method for providing an electron blocking layer with doping control

#22
20140054532
2014-02-27

Access device having counter doping layer and semiconductor memory device having the same

#23
20140042598
2014-02-13

Composite substrate and method of manufacturing the same

#24
20140001514
2014-01-02

Semiconductor Device and Method for Producing a Doped Semiconductor Layer

#25
20130112250
2013-05-09

Process of forming an aluminum p-doped surface region of a semiconductor substrate

#26
20110250739
2011-10-13

EPITAXIAL WAFER HAVING A HEAVILY DOPED SUBSTRATE AND PROCESS FOR THE PREPARATION THEREOF

#27
20110049682
2011-03-03

System and method for substrate wafer back side and edge cross section seals

#28
20100240171
2010-09-23

Method of fabricating a multijunction solar cell

#29
20100093156
2010-04-15

Method for production of silicon wafer for epitaxial substrate and method for production of epitaxial substrate

#30
20090321744
2009-12-31

Buffer layer for promoting electron mobility and thin film transistor having the same

#31
20090314210
2009-12-24

Epitaxial growth susceptor

#32
20090252974
2009-10-08

EPITAXIAL WAFER HAVING A HEAVILY DOPED SUBSTRATE AND PROCESS FOR THE PREPARATION THEREOF

#33
20090130806
2009-05-21

Power semiconductor component with charge compensation structure and method for the fabrication thereof

#34
20090127673
2009-05-21

METHOD FOR PRODUCING SEMI-CONDUCTING DEVICES AND DEVICES OBTAINED WITH THIS METHOD

#35
20090004458
2009-01-01

Diffusion Control in Heavily Doped Substrates

#36
20080242067
2008-10-02

SEMICONDUCTOR SUBSTRATE AND METHOD OF MANUFACTURE THEREOF

#37
20080149177
2008-06-26

Multijunction solar cell with two step diffusion region in substrate

#38
20080076237
2008-03-27

Method for producing semi-conducting devices and devices obtained with this method

#39
20070128836
2007-06-07

Manufacturing method of semiconductor wafer having a trench structure and epitaxial layer

#40
20070108512
2007-05-17

Power semiconductor component with charge compensation structure and method for the fabrication thereof

#41
20070065671
2007-03-22

Two layer LTO temperature oxide backside seal for a wafer

#42
20070054468
2007-03-08

Method for producing silicon epitaxial wafer

#43
20060148225
2006-07-06

Methods for fabricating strained layers on semiconductor substrates

#44
20060145166
2006-07-06

Semiconductor apparatus, method for growing nitride semiconductor and method for producing semiconductor apparatus

#45
20060038173
2006-02-23

Buffer layer for promoting electron mobility and thin film transistor having the same

#46
20060029817
2006-02-09

Wafer for preventing the formation of silicon nodules and method for preventing the formation of silicon nodules

#47
20050227464
2005-10-13

Controlling dopant diffusion in a semiconductor region

#48
20050176220
2005-08-11

Semiconductor device and method for manufacturing thereof

#49
20050103261
2005-05-19

Epitaxially coated semiconductor wafer

#50
20050006635
2005-01-13

Semiconductor apparatus, method for growing nitride semiconductor and method for producing semiconductor apparatus

#51
20050000449
2005-01-06

Susceptor for epitaxial growth and epitaxial growth method

#52
13622194
2015-08-18

Semiconductor devices with dopant migration suppression and method of fabrication thereof