207230 ⎘
Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof; Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AB compounds with or without impurities, e.g. doping materials; Treatment of semiconductor bodies using processes or apparatus not provided for in groups - to form insulating layers thereon, e.g. for masking or by using photolithographic techniques ; After treatment of these layers; Selection of materials for these layers Inorganic layers
Methods of manufacturing an integrated circuit having stress tuning layer
#2Methods of manufacturing an integrated circuit having stress tuning layer
#3Semiconductor device and manufacturing method thereof
#4Methods of manufacturing an integrated circuit having stress tuning layer
#5Methods of manufacturing an integrated circuit having stress tuning layer
#6Selective dielectric spacer deposition for exposing sidewalls of a finFET
#7Methods for integration of pore stuffing material
#8Semiconductor device and manufacturing method thereof
#9Methods of forming a sidewall spacer having a generally triangular shape and a semiconductor device having such a spacer
#10Materials and methods for stress reduction in semiconductor wafer passivation layers
#11Integrated circuit having stress tuning layer
#12Passivation of aluminum nitride substrates
#13MULTILAYERED CAP BARRIER IN MICROELECTRONIC INTERCONNECT STRUCTURES
#14Methods of making copper selenium precursor compositions with a targeted copper selenide content and precursor compositions and thin films resulting therefrom
#15INSULATING FILM MATERIAL, METHOD FOR FORMING FILM BY USING THE INSULATING FILM MATERIAL, AND INSULATING FILM
#16Passivation of aluminum nitride substrates
#17Method of manufacturing integrated circuit having stress tuning layer
#18Methods of removing water from semiconductor substrates and methods of depositing atomic layers using the same
#19Semiconductor device and method of fabricating the same
#20Semiconductor component with stress-absorbing semiconductor layer
#21Passivation of aluminum nitride substrates
#22Source material for preparing low dielectric constant material
#23Composition for chemical vapor deposition film-formation and method for production of low dielectric constant film
#24In situ deposition of a low κ dielectric layer, barrier layer, etch stop, and anti-reflective coating for damascene application
#25Functional film containing structure and method of manufacturing functional film
#26Dielectric interface for group III-V semiconductor device
#27Method for forming interlayer insulating film in semiconductor device
#28Boron derived materials deposition method
#29Fabrication method of semiconductor integrated circuit device
#30Multilayered cap barrier in microelectronic interconnect structures
#31ELECTRON BEAM MODIFICATION OF CVD DEPOSITED LOW DIELECTRIC CONSTANT MATERIALS
#32Low-temperature-grown (LTG) insulated-gate PHEMT device and method
#33Integrated circuit having stress tuning layer
#34Dielectric material having carborane derivatives
#35Methods for coating and filling high aspect ratio recessed features
#36Dielectric interface for group III-V semiconductor device
#37Method for forming an insulating film in a semiconductor device
#38Method of depositing low k barrier layers
#39Semiconductor device and method of fabricating the same
#40Method of passivating compound semiconductor surfaces
#41Phosphorus-containing silazane composition, phosphorus-containing siliceous film, phosphorus-containing siliceous filler, method for producing phosphorus-containing siliceous film, and semiconductor device
#42Method for forming dual damascene structures with tapered via portions and improved performance
#43Method of fabricating a multilayered dielectric diffusion barrier layer
#44Methods for making dual-damascene dielectric structures
#45Modulating nuclear receptor coactivator binding
#46Method of depositing dielectric films
#47Production method for semiconductor component with stress-carrying semiconductor layer
#48Method for forming an interface between germanium and other materials
#49Low dielectric constant material having thermal resistance, insulation film between semiconductor layers using the same, and semiconductor device
#50In situ deposition of a low K dielectric layer, barrier layer, etch stop, and anti-reflective coating for damascene application
#51Dielectric material having carborane derivatives
#52Methods for the determination of film continuity and growth modes in thin dielectric films
#53Semiconductor device and method for manufacturing same
#54Silicon oxycarbide and silicon carbonitride based materials for MOS devices
#55Manufacturing method for semiconductor device, and system to which semiconductor is applied
#56Photo-assisted method for semiconductor fabrication
#57Process for preparing low dielectric constant material
#58Silicon carbide deposition for use as a low dielectric constant anti-reflective coating
#59Interlayer adhesion promoter for low k materials
#60Method of forming a semi-insulating region
#61Method of forming a semi-insulating region
#62Method of manufacturing semiconductor device
#63Fabrication method of semiconductor integrated circuit device
#64Semiconductor module having an insulation layer and method for fabricating a semiconductor module having an insulation layer
#65Method of fabricating a contact
#66Plasma treatment to enhance adhesion and to minimize oxidation of carbon-containing layers
#67Method of forming a semi-insulating region
#68Method of forming a diffusion barrier
#69Method of depositing dielectric films
#70Selective dielectric spacer deposition for exposing sidewalls of a finFET