207456 ⎘
Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof; Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof; Manufacture of specific parts of devices defined in group; Making of isolation regions between components between components manufactured in an active substrate comprising AIII BV compounds
TRANSISTORS WITH SELF-ALIGNED SOURCE-CONNECTED FIELD PLATES
#2TYPE III-V SEMICONDUCTOR DEVICE WITH STRUCTURED PASSIVATION
#3METHOD FOR PRODUCING SEMICONDUCTOR DEVICE
#4NITRIDE SEMICONDUCTOR DEVICE
#5ISOLATION OF A POWER HEMT FROM OTHER CIRCUITS
#6Extrinsic field termination structures for improving reliability of high-voltage, high-power active devices
#7Parasitic capacitance reduction in GaN-on-silicon devices
#8Nitride semiconductor device
#9ELECTRICALLY PROGRAMMABLE FUSE OVER CRYSTALLINE SEMICONDUCTOR MATERIALS
#10NITRIDE SEMICONDUCTOR SUBSTRATE AND MANUFACTURING METHOD THEREFOR
#11NITRIDE-BASED SEMICONDUCTOR IC CHIP AND METHOD FOR MANUFACTURING THE SAME
#12Nitride-based semiconductor device and method for manufacturing the same
#13TRANSISTOR WITH DIELECTRIC SPACERS AND FIELD PLATE AND METHOD OF FABRICATION THEREFOR
#14ISOLATION STRUCTURE FOR ACTIVE DEVICES
#15Nitride-based semiconductor device and method for manufacturing the same
#16Type III-V semiconductor device with structured passivation
#17SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
#18TRANSISTOR WITH ALIGNED FIELD PLATE AND METHOD OF FABRICATION THEREFOR
#19Field effect transistors with dual field plates
#20TRANSISTORS WITH SOURCE-CONNECTED FIELD PLATES
#21TRANSISTORS WITH SELF-ALIGNED SOURCE-CONNECTED FIELD PLATES
#22N-FACE POLAR GAN-BASED DEVICE AND COMPOSITE SUBSTRATE THEREOF, AND METHOD OF MANUFACTURING COMPOSITE SUBSTRATE
#23Nitride-based semiconductor device and method for manufacturing the same
#24Nitride-based semiconductor device and method for manufacturing the same
#25COMPLEX FIELD-SHAPING BY FINE VARIATION OF LOCAL MATERIAL DENSITY OR PROPERTIES
#26FIELD EFFECT TRANSISTOR WITH SELECTIVE CHANNEL LAYER DOPING
#27High electron mobility transistors having improved performance
#28Methods of manufacturing high electron mobility transistors having a modified interface region
#29SEMICONDUCTOR DEVICE WITH CONDUCTIVE ELEMENT FORMED OVER DIELECTRIC LAYERS AND METHOD OF FABRICATION THEREFOR
#30GROUP III-NITRIDE TRANSISTORS WITH BACK BARRIER STRUCTURES AND BURIED P-TYPE LAYERS AND METHODS THEREOF
#31Circuits and group III-nitride high-electron mobility transistors with buried p-type layers improving overload recovery and process for implementing the same
#32SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
#33Semiconductor device
#34WAFER SCALE PACKAGING
#35TRANSISTOR CELL INCLUDING AN IMPLANTED EXPANSION REGION
#36Semiconductor device
#37High-threshold-voltage normally-off high-electron-mobility transistor and preparation method therefor
#38Nitride semiconductor device
#39SEMICONDUCTOR DEVICE AND METHOD FOR PRODUCING THE SAME
#40Parasitic capacitance reduction in GaN devices
#41Extrinsic field termination structures for improving reliability of high-voltage, high-power active devices
#42Isolation structure for active devices
#43Method for transferring compound semiconductor single crystal thin film layer and method for preparing single crystal GaAs-OI composite wafer
#44Nitride semiconductor device
#45High power gallium nitride electronics using miscut substrates
#46Touch sensing circuits and methods for detecting touch events
#47Isolation structure for active devices
#48Wafer scale packaging
#49Parasitic capacitance reduction in GaN-on-silicon devices
#50Formation of a III-N semiconductor structure
#51High power gallium nitride electronics using miscut substrates
#52Semiconductor device combining passive components with HEMT
#53Isolation structure for active devices
#54Compound semiconductor device and fabrication method
#55Isolation structure for active devices
#56Bonded substrate for epitaxial growth and method of forming the same
#57High power gallium nitride electronics using miscut substrates
#58Wafer scale packaging
#59GaN transistors with polysilicon layers used for creating additional components
#60Semiconductor component and method of manufacture
#61Apparatus and associated method
#62Forming zig-zag trench structure to prevent aspect ratio trapping defect escape
#63Integrated multichannel and single channel device structure and method of making the same
#64Semiconductor device and method for manufacturing the same
#65High resistance layer for III-V channel deposited on group IV substrates for MOS transistors
#66Method of forming an integrated multichannel device and single channel device structure
#67Semiconductor component and method of manufacture
#68Wafer scale packaging
#69Method of manufacturing a high breakdown voltage III-nitride device
#70High power gallium nitride electronics using miscut substrates
#71Nitride-based semiconductor device and method for manufacturing the same
#72Growth of multi-layer group III-nitride buffers on large-area silicon substrates and other substrates
#73Growth of multi-layer group III-nitride buffers on large-area silicon substrates and other substrates
#74High breakdown voltage III-nitride device
#75Growth of multi-layer group III-nitride buffers on large-area silicon substrates and other substrates
#76III-nitride monolithic IC
#77Semiconductor integrated circuit device and method of fabricating the same
#78METHOD FOR FORMING TRENCH ISOLATION USING GAS CLUSTER ION BEAM PROCESSING
#79Method for producing an area having reduced electrical conductivity within a semiconductor layer and optoelectronic semiconductor element
#80Fabrication of substrates with a useful layer of monocrystalline semiconductor material
#81III-V compound semiconductor heterostructure MOSFET device
#82Structure and method for III-nitride monolithic power IC
#83SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
#84Electronic device
#85Structure and method for III-nitride device isolation
#86Integrated anneal cap/ ion implant mask/ trench isolation structure for III-V devices
#87Gallium nitride material structures including isolation regions and methods
#88Void isolated III-nitride device
#89Structure and method for III-nitride monolithic power IC
#90Semiconductor device and method for manufacturing the same
#91Buried field shield in III-V compound semiconductor trench MOSFETs via etch and regrowth