ClassID:

207462

H01L21/76213 - CPC Classification

Classification description:

Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof; Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof; Manufacture of specific parts of devices defined in group; Making of isolation regions between components; Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO introducing electrical inactive or active impurities in the local oxidation region, e.g. to alter LOCOS oxide growth characteristics or for additional isolation purpose

Recent Application in this class:
#1
20250391702
2025-12-25

METHOD FOR OXIDISING A SILICON LAYER

#2
20240421198
2024-12-19

SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SAME

#3
20230197781
2023-06-22

Bulk Nanosheet with Dielectric Isolation

#4
20220165625
2022-05-26

UNIVERSAL ELECTRICALLY INACTIVE DEVICES FOR INTEGRATED CIRCUIT PACKAGES

#5
20200395240
2020-12-17

Semiconductor structure with partially embedded insulation region and related method

#6
20200058540
2020-02-20

Semiconductor structure with partially embedded insulation region

#7
20190312104
2019-10-10

Bulk nanosheet with dielectric isolation

#8
20180226301
2018-08-09

Method and apparatus with channel stop doped devices

#9
20180096985
2018-04-05

Method of manufacturing a semiconductor device

#10
20180076083
2018-03-15

Footing removal for nitride spacer

#11
20170317168
2017-11-02

Bulk nanosheet with dielectric isolation

#12
20170309706
2017-10-26

Bulk nanosheet with dielectric isolation

#13
20170271199
2017-09-21

Semiconductor device with localized carrier lifetime reduction and fabrication method thereof

#14
20170062593
2017-03-02

Active regions with compatible dielectric layers

#15
20170054024
2017-02-23

Strained finFET device fabrication

#16
20170054002
2017-02-23

Strained finFET device fabrication

#17
20170053942
2017-02-23

Strained FinFET device fabrication

#18
20170053838
2017-02-23

Strained finFET device fabrication

#19
20160225659
2016-08-04

Methods of forming fin isolation regions on FinFET semiconductor devices by implantation of an oxidation-retarding material

#20
20160099309
2016-04-07

Method for growing III-V epitaxial layers

#21
20150295069
2015-10-15

Manufacturing method for semiconductor device with discrete field oxide structure

#22
20150140752
2015-05-21

Multiple-time programming memory cells and methods for forming the same

#23
20140308798
2014-10-16

Multiple-time programming memory cells and methods for forming the same

#24
20140154855
2014-06-05

Method and apparatus with channel stop doped devices

#25
20140077342
2014-03-20

Semiconductor device having buried layer and method for forming the same

#26
20130309855
2013-11-21

Methods for reoxidizing an oxide and for fabricating semiconductor devices

#27
20130256772
2013-10-03

Multiple-time programming memory cells and methods for forming the same

#28
20130140667
2013-06-06

Localized carrier lifetime reduction

#29
20110254119
2011-10-20

Semiconductor Device and Method of Manufacturing the Same

#30
20110230002
2011-09-22

Local oxidation of silicon processes with reduced lateral oxidation

#31
20100075477
2010-03-25

Method of Manufacturing Semiconductor Device

#32
20090130820
2009-05-21

METHOD FOR MANUFACTURING A SEMICONDUCTOR DEVICE

#33
20090053879
2009-02-26

Method of fabricating semiconductor device

#34
20080203542
2008-08-28

Structures including an at least partially reoxidized oxide material

#35
20080057671
2008-03-06

Semiconductor structures for latch-up suppression and methods of forming such semiconductor structures

#36
20070241409
2007-10-18

Semiconductor structures for latch-up suppression and methods of forming such semiconductor structures

#37
20070170518
2007-07-26

Semiconductor structures for latch-up suppression and methods of forming such semiconductor structures

#38
20070155187
2007-07-05

Method for preparing a gate oxide layer

#39
20070059943
2007-03-15

Ion-assisted oxidation methods and the resulting structures

#40
20060094254
2006-05-04

Method for forming field oxide

#41
20060068552
2006-03-30

Method of manufacturing semiconductor device

#42
20050064651
2005-03-24

Methods for forming a device isolation structure in a semiconductor device

#43
15173766
2017-10-03

Threshold voltage and well implantation method for semiconductor devices