209483 ⎘
Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by; Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto; Bonding areas; Manufacturing methods related thereto; Manufacturing methods by patterning a pre-deposited material Mechanical treatment, e.g. polishing, grinding
METHOD OF FORMING BONDING CONTACT, BONDING STRUCTURE AND SEMICONDUCTOR DEVICE
#2MANUFACTURING METHOD OF SEMICONDUCTOR CHIP
#3SEMICONDUCTOR DEVICE WITH BACKSIDE INTERFACE MECHANISM AND METHODS FOR MANUFACTURING THE SAME
#4FLAT METAL FEATURES FOR MICROELECTRONICS APPLICATIONS
#5CHIP PACKAGE WITH HIGHER BEARING CAPACITY IN WIRE BONDING
#6MANUFACTURING METHOD OF SEMICONDUCTOR CHIP
#7Semiconductor device and method for manufacturing semiconductor device
#8Flat metal features for microelectronics applications
#9Interconnect structure and method of forming same
#10Three-dimensional integrated circuit and method of manufacturing the same
#11Flat metal features for microelectronics applications
#12Packaging process
#13Ultrathin layer for forming a capacitive interface between joined integrated circuit component
#14Flat metal features for microelectronics applications
#15Interconnect structure and method of forming same
#16Final passivation for wafer level warpage and ULK stress reduction
#17Method for improving wire bonding strength of an image sensor
#18Pad structure and manufacturing method thereof
#19SHEET MOLDING PROCESS FOR WAFER LEVEL PACKAGING
#20Interconnect structure and method of forming same
#21Semiconductor device having gaps within the conductive parts
#22Method of manufacturing a layer structure having partially sealed pores
#23Semiconductor apparatus, solid state imaging device, imaging apparatus and electronic equipment, and manufacturing method thereof
#24Wafer to wafer bonding process and structures
#25Integrated device package comprising photo sensitive fill between a substrate and a die
#26Semiconductor device having a low-adhesive bond substrate pair
#27Interconnect structure and method of forming same
#28Method for bonding metallic contact areas with solution of a sacrificial layer applied on one of the contact areas
#29Semiconductor device package with organic interposer
#30Chip parts and method for manufacturing the same, circuit assembly having the chip parts and electronic device
#31Semiconductor packaging structure and manufacturing method for the same
#32Plug via formation with grid features in the passivation layer
#33Conductive structure and method for forming the same
#34Compliant interconnects in wafers
#35Semiconductor device and method of forming the same
#36Method for manufacturing an electronic device by reducing thickness of electronic members attached to a carrier
#37Conductive structure and method for forming the same
#38Enhanced WLP for superior temp cycling, drop test and high current applications
#39Semiconductor device and method of forming the same
#40Compliant interconnects in wafers
#41Enhanced WLP for superior temp cycling, drop test and high current applications
#42Methods of forming a semiconductor device including a diffusion barrier film
#43Method for re-routing lithography-free microelectronic devices
#44Final passivation for wafer level warpage and ULK stress reduction