209509 ⎘
Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by; Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto; Bonding areas; Manufacturing methods related thereto; Manufacturing methods; Post-treatment of the bonding area; Reworking, e.g. shaping Chemical mechanical polishing [CMP]
CONDUCTIVE POLYMER MATERIALS FOR HYBRID BONDING
#2Chip, Chip Stacked Structure, Chip Package Structure, and Electronic Device
#3SEMICONDUCTOR DEVICE AND METHODS OF FORMATION
#4SLOTTED BOND PAD IN STACKED WAFER STRUCTURE
#5INTEGRATED CIRCUIT DIE BONDING PADS
#6SEMICONDUCTOR DEVICE STRUCTURE HAVING HYBRID BOND STRUCTURE WITH AIR GAP AND METHOD OF MANUFACTURING THE SAME
#7SEMICONDUCTOR DEVICE STRUCTURE HAVING HYBRID BOND STRUCTURE WITH AIR GAP AND METHOD OF MANUFACTURING THE SAME
#8SEMICONDUCTOR DEVICE STRUCTURE HAVING HYBRID BOND STRUCTURE WITH AIR GAP AND METHOD OF MANUFACTURING THE SAME
#9INTEGRATED BONDING PADS WITH CONVEX SIDEWALLS AND METHODS FOR FORMING THE SAME
#10METHOD FOR FORMING SEMICONDUCTOR STRUCTURE
#11HIGH CAPACITANCE HYBRID BONDED CAPACITOR DEVICE
#12SEMICONDUCTOR PACKAGE AND METHOD FOR MANUFACTURING THE SAME
#13SEMICONDUCTOR DEVICE AND ELECTRONIC SYSTEM INCLUDING SEMICONDUCTOR DEVICE
#14PHOTONIC ASSEMBLY FOR ENHANCED BONDING YIELD AND METHODS FOR FORMING THE SAME
#15BONDED STRUCTURES WITH INTEGRATED PASSIVE COMPONENT
#16FINE-GRAIN INTEGRATION OF RADIO FREQUENCY ANTENNAS, INTERCONNECTS, AND PASSIVES
#17LAMINATE MANUFACTURING METHOD AND LAMINATE
#18SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
#19Grain Structure Engineering for Metal Gapfill Materials
#20SEMICONDUCTOR PACKAGE
#21DIE ON DIE BONDING STRUCTURE
#22DIRECT HYBRID BOND PAD HAVING TAPERED SIDEWALL
#23ELECTRONIC DEVICES AND METHODS OF MANUFACTURING ELECTRONIC DEVICES
#24SEMICONDUCTOR PACKAGE
#25SEMICONDUCTOR ELEMENT WITH BONDING LAYER HAVING LOW-K DIELECTRIC MATERIAL
#26SYSTEM AND METHOD FOR BONDING TRANSPARENT CONDUCTOR SUBSTRATES
#27MULTI-METAL CONTACT STRUCTURE
#28CHIP PACKAGE STRUCTURE AND METHOD FOR PREPARING CHIP PACKAGE STRUCTURE
#29Adding Sealing Material to Wafer edge for Wafer Bonding
#30Methods for forming metal gapfill with low resistivity
#31LAYOUT METHOD OF SEMICONDUCTOR, INSPECTION METHOD OF WAFER, MANUFACTURING METHOD OF THE WAFER AND MANUFACTURING METHOD OF MULTI-CHIP PACKAGE
#32SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING SEMICONDUCTOR PACKAGE
#33SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME
#34SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
#35Semiconductor device including a structure for higher integration
#36Method for forming semiconductor structure
#37EXPANSION CONTROLLED STRUCTURE FOR DIRECT BONDING AND METHOD OF FORMING SAME
#38HYBRID BONDING A DIE TO A SUBSTRATE WITH VIAS CONNECTING METAL PADS ON BOTH SIDES OF THE DIE
#39Bonded structures with integrated passive component
#40Die bonding pads and methods of forming the same
#41Method of forming integrated chip structure having slotted bond pad in stacked wafer structure
#42Semiconductor device and method of manufacturing the same
#43Semiconductor structure having polygonal bonding pad
#44Method of manufacturing semiconductor structure having polygonal bonding pad
#45Semiconductor structure and method for forming semiconductor structure, stacked structure, and wafer stacking method
#46Contact pad fabrication process for a semiconductor product
#47Method of fabricating integrated circuit device
#48SEMICONDUCTOR DEVICE, EQUIPMENT, AND MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE
#49Semiconductor device and method of manufacturing the same
#50SUBSTRATE BONDING
#51Die on die bonding structure
#52SEMICONDUCTOR DEVICE
#53Semiconductor structure
#54Iterative formation of damascene interconnects
#55Hybrid pocket post and tailored via dielectric for 3D-integrated electrical device
#56Wafer on wafer bonding structure
#57Semiconductor device and method of manufacturing the same
#58BONDING PAD STRUCTURE, SEMICONDUCTOR STRUCTURE, SEMICONDUCTOR PACKAGE STRUCTURE AND METHOD FOR PREPARING SAME
#59Iterative formation of damascene interconnects
#60Semiconductor device, method of manufacturing semiconductor device, and imaging element
#61Method of treatment of an electronic circuit for a hybrid molecular bonding
#62Multi-metal contact structure
#63Semiconductor device and manufacturing method thereof
#64Semiconductor device including bonding pads and method of manufacturing the same
#65Semiconductor device and method of manufacturing the same
#66Semiconductor structure and method for forming the same
#67Multi-metal contact structure in microelectronic component
#68Semiconductor structure with conductive structure
#69Semiconductor structure with conductive structure
#70Method of manufacturing wafer level low melting temperature interconnections
#71Die structure, die stack structure and method of fabricating the same
#72Self-alignment of a pad and ground in an image sensor
#73Semiconductor structure and method for forming the same
#74Integrated circuit system with carrier construction configuration and method of manufacture thereof
#75Semiconductor device including built-in crack-arresting film structure
#76Semiconductor structure with conductive structure
#77Bonded structures with integrated passive component
#78Conductive pad structure for hybrid bonding and methods of forming same
#79Method of bonding semiconductor substrates
#80Semiconductor device including built-in crack-arresting film structure
#81Air trench in packages incorporating hybrid bonding
#82Process for producing a structure by assembling at least two elements by direct adhesive bonding
#83Semiconductor-on-insulator with back side heat dissipation
#84Conductive pad structure for hybrid bonding and methods of forming same
#85Semiconductor device including built-in crack-arresting film structure
#86Integrated WLUF and SOD process
#87Hybrid bonding with air-gap structure
#88Air trench in packages incorporating hybrid bonding
#89Semiconductor devices having a TSV, a front-side bumping pad, and a back-side bumping pad
#90Method for manufacturing semiconductor device with metal-containing film layer at bonding surface thereof
#91Preventing misshaped solder balls
#92Rework and stripping of complex patterning layers using chemical mechanical polishing
#93Hybrid bonding with air-gap structure
#94Substrate bonding with diffusion barrier structures
#95Conductive pad structure for hybrid bonding and methods of forming same
#96Semiconductor constructions having through-substrate interconnects
#97Method for producing photosensitive infrared detectors
#98Semiconductor-on-insulator with back side strain topology
#99Chip-on-wafer bonding method and bonding device, and structure comprising chip and wafer
#100Semiconductor device and method of forming multi-layered UBM with intermediate insulating buffer layer to reduce stress for semiconductor wafer
#101Integrated WLUF and SOD process
#102Three dimensional integrated circuit structures and hybrid bonding methods for semiconductor wafers
#103Semiconductor constructions and methods of planarizing across a plurality of electrically conductive posts
#104Semiconductor constructions
#105Semiconductor device, method for manufacturing semiconductor device, and electronic apparatus
#106Bonding surfaces for direct bonding of semiconductor structures
#107Methods of forming through-substrate interconnects
#108Semiconductor device and method for manufacturing the same
#109Semiconductor device and method of forming multi-layered UBM with intermediate insulating buffer layer to reduce stress for semiconductor wafer
#110Semiconductor-on-insulator with back side strain inducing material
#111Method and structure for top metal formation of liquid crystal on silicon devices
#112Semiconductor device and manufacturing method thereof
#113Semiconductor-on-insulator with back side heat dissipation
#114Bonding of substrates including metal-dielectric patterns with metal raised above dielectric
#115Semiconductor device manufacturing method