ClassID:

209518

H01L2224/03916 - CPC Classification

Classification description:

Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by; Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto; Bonding areas; Manufacturing methods related thereto; Manufacturing methods; Methods of manufacturing bonding areas involving a specific sequence of method steps a passivation layer being used as a mask for patterning the bonding area

Recent Application in this class:
#1
20250140627
2025-05-01

PASSIVATION STRUCTURE WITH PLANAR TOP SURFACES

#2
20240395741
2024-11-28

METHOD OF FORMING OPENING IN PASSIVATION LAYER AND STRUCTURES THEREOF

#3
20240088002
2024-03-14

SYSTEM-LEVEL FAN-OUT PACKAGING STRUCTURE AND METHOD FOR MANUFACTURING SAME

#4
20230378106
2023-11-23

Patterned and planarized under-bump metallization

#5
20230360992
2023-11-09

Passivation structure with planar top surfaces

#6
20220302108
2022-09-22

Through silicon via design for stacking integrated circuits

#7
20220262698
2022-08-18

Passivation structure with planar top surfaces

#8
20220059478
2022-02-24

Method for fabricating semiconductor device

#9
20210343707
2021-11-04

Through silicon via design for stacking integrated circuits

#10
20210272918
2021-09-02

Semiconductor devices, semiconductor packages, and methods of manufacturing the semiconductor devices

#11
20210134744
2021-05-06

SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME

#12
20210118833
2021-04-22

Connector structure and method of forming same

#13
20200312800
2020-10-01

Semiconductor structure and manufacturing method thereof

#14
20200251443
2020-08-06

Warpage-compensated bonded structure including a support chip and a three-dimensional memory chip

#15
20200243516
2020-07-30

Through silicon via design for stacking integrated circuits

#16
20200105668
2020-04-02

Vias with metal caps for underlying conductive lines

#17
20200035672
2020-01-30

Through silicon via design for stacking integrated circuits

#18
20190363079
2019-11-28

Through silicon via design for stacking integrated circuits

#19
20190279953
2019-09-12

Connector structure and method of forming same

#20
20190259723
2019-08-22

Fabrication method of semiconductor structure

#21
20190259718
2019-08-22

Semiconductor devices, semiconductor packages, and methods of manufacturing the semiconductor devices

#22
20190252338
2019-08-15

Semiconductor devices and semiconductor devices including a redistribution layer

#23
20190027450
2019-01-24

Semiconductor devices, semiconductor packages, and methods of manufacturing the semiconductor devices

#24
20170365691
2017-12-21

Method of forming a contact

#25
20170358547
2017-12-14

Semiconductor devices including conductive pillars

#26
20170309585
2017-10-26

Fabrication method of semiconductor structure

#27
20170243846
2017-08-24

Connector structure and method of forming same

#28
20160379947
2016-12-29

Semiconductor device with metal structure electrically connected to a conductive structure

#29
20160225731
2016-08-04

Methods of forming conductive materials on semiconductor devices, and methods of forming electrical interconnects

#30
20160190080
2016-06-30

Semiconductor structure and method of fabricating the same

#31
20130134603
2013-05-30

Semiconductor devices including protected barrier layers

#32
20120299187
2012-11-29

Aluminum Bond Pad With Trench Thinning for Fine Pitch Ultra-Thick Aluminum Products

#33
20120261812
2012-10-18

SEMICONDUCTOR CHIP WITH PATTERNED UNDERBUMP METALLIZATION

#34
20120261608
2012-10-18

Etchant and method for manufacturing semiconductor device using same

#35
20110291273
2011-12-01

Chip bump structure and method for forming the same

#36
20110049707
2011-03-03

SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SEMICONDUCTOR DEVICE

#37
14580960
2016-05-03

Method for forming stacked metal contact in electrical communication with aluminum wiring in semiconductor wafer of integrated circuit