Patents-Review.com
ClassID:

209889 ⎘

H01L2224/279 - CPC Classification

Classification description:

Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by; Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto; Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto; Manufacturing methods Methods of manufacturing layer connectors involving a specific sequence of method steps

Sub-classes:
Recent Application in this class:
#1
20250226346
2025-07-10

POWER SEMICONDUCTOR, MOLDED MODULE, AND METHOD

 #2
20240170435
2024-05-23

ANISOTROPIC CONDUCTIVE FILM WITH CARBON-BASED CONDUCTIVE REGIONS AND RELATED SEMICONDUCTOR DEVICE ASSEMBLIES AND METHODS

 #3
20220102307
2022-03-31

Dielectric and metallic nanowire bond layers

 #4
20220077098
2022-03-10

Anisotropic conductive film with carbon-based conductive regions and related semiconductor device assemblies and methods

 #5
20200321304
2020-10-08

Dielectric and metallic nanowire bond layers

 #6
20200211996
2020-07-02

Anisotropic conductive film with carbon-based conductive regions and related semiconductor assemblies, systems, and methods

 #7
20190198376
2019-06-27

Wafer level flat no-lead semiconductor packages and methods of manufacture

 #8
20190198375
2019-06-27

Wafer level flat no-lead semiconductor packages and methods of manufacture

 #9
20190198374
2019-06-27

Wafer level flat no-lead semiconductor packages and methods of manufacture

 #10
20190035760
2019-01-31

Anisotropic conductive film (ACF) and forming method thereof, ACF roll, bonding structure and display device

 #11
20190035703
2019-01-31

Ag underlayer-attached metallic member, Ag underlayer-attached insulating circuit substrate,semiconductor device, heat sink-attached insulating circuit substrate, and method for manufacturing Ag underlayer-attached metallic member

 #12
20190006301
2019-01-03

3D packaging method for semiconductor components

 #13
20180174881
2018-06-21

Wafer level flat no-lead semiconductor packages and methods of manufacture

 #14
20180148319
2018-05-31

Hermetically sealed MEMS device and its fabrication

 #15
20170236799
2017-08-17

Bonding method for connecting two wafers

 #16
20160284566
2016-09-29

Semiconductor device mounting method

 #17
20160190089
2016-06-30

Wafer to wafer bonding process and structures

 #18
20160027694
2016-01-28

Wafer level flat no-lead semiconductor packages and methods of manufacture

 #19
20140327113
2014-11-06

3D integrated heterostructures having low-temperature bonded interfaces with high bonding energy

 #20
20130215583
2013-08-22

Embedded electrical component surface interconnect

 #21
20120043647
2012-02-23

Low-temperature bonding process

 #22
20110263078
2011-10-27

Method for manufacturing semiconductor device

 #23
20100132187
2010-06-03

Part mounting method

 #24
17381515
2022-06-07

Method of measuring underfill profile of underfill cavity having solder bumps