ClassID:

211014

H01L2224/81209 - CPC Classification

Classification description:

Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by; Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector; Applying energy for connecting; Compression bonding applying isostatic pressure, e.g. degassing using vacuum or a pressurised liquid

Recent Application in this class:
#1
20180374751
2018-12-27

3D integration method using SOI substrates and structures produced thereby

#2
20180337091
2018-11-22

3D integration method using SOI substrates and structures produced thereby

#3
20180315655
2018-11-01

3D integration method using SOI substrates and structures produced thereby

#4
20160155720
2016-06-02

Method and apparatus for chip-to-wafer integration

#5
20150118784
2015-04-30

Focal plane array packaging using isostatic pressure processing

#6
20140183758
2014-07-03

Method of manufacturing semiconductor device, block stacked body, and sequential stacked body

#7
20120199988
2012-08-09

METHOD OF MANUFACTURING ELECTRONIC DEVICE, ELECTRONIC DEVICE, AND APPARATUS FOR MANUFACTURING ELECTRONIC DEVICE

#8
20120193752
2012-08-02

3D integration method using SOI substrates and structures produced thereby

#9
20120118939
2012-05-17

PROCESS AND APPARATUS FOR MANUFACTURING SEMICONDUCTOR DEVICE

#10
20120061820
2012-03-15

Method for manufacturing electronic component, and electronic component

#11
20110020983
2011-01-27

Flip-chip mounting method, flip-chip mounting apparatus and tool protection sheet used in flip-chip mounting apparatus

#12
20090221208
2009-09-03

Adjusting Apparatus of Gap Width and Method Thereof

#13
20070284409
2007-12-13

HIGHLY COMPLIANT PLATE FOR WAFER BONDING

#14
20070231952
2007-10-04

Method of forming a microelectronic package using control of die and substrate differential expansions and microelectronic package formed according to the method

#15
20060003548
2006-01-05

Highly compliant plate for wafer bonding