ClassID:

211283

H01L2224/83139 - CPC Classification

Classification description:

Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by; Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector; Aligning involving guiding structures, e.g. spacers or supporting members the guiding structures being at least partially left in the finished device Guiding structures on the body

Recent Application in this class:
#1
20240312955
2024-09-19

Bonding Structure

#2
20230282633
2023-09-07

Method of manufacturing a semiconductor device

#3
20230268457
2023-08-24

LIGHTING ELEMENT ALIGNMENT

#4
20210296299
2021-09-23

Semiconductor device

#5
20180277518
2018-09-27

SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF

#6
20180175089
2018-06-21

Camera module and electronic apparatus to lower risk of breakage of camera module

#7
20170323805
2017-11-09

Film, method for its production, and method for producing semiconductor element using the film

#8
20170236799
2017-08-17

Bonding method for connecting two wafers

#9
20170170160
2017-06-15

Opto-electronic apparatus and manufacturing method thereof

#10
20160087172
2016-03-24

Edge coupling alignment using embedded features

#11
20160005694
2016-01-07

Semiconductor package structure, alignment structure, and alignment method

#12
20150364441
2015-12-17

Micro-pillar assisted semiconductor bonding

#13
20150279792
2015-10-01

Drive chip and display apparatus

#14
20150270207
2015-09-24

Semiconductor module package and method of manufacturing the same

#15
20150262967
2015-09-17

Hermetically sealed wafer packages

#16
20150187704
2015-07-02

Method of joining semiconductor substrate

#17
20150035120
2015-02-05

Wafer scale package for high power devices

#18
20140361429
2014-12-11

Semiconductor device with bumps and display device module incorporating the same

#19
20140353818
2014-12-04

Power module comprising two substrates and method of manufacturing the same

#20
20140346643
2014-11-27

Integrated bondline spacers for wafer level packaged circuit devices

#21
20140193948
2014-07-10

Integrated bondline spacers for wafer level packaged circuit devices

#22
20140175477
2014-06-26

Edge coupling alignment using embedded features

#23
20140124899
2014-05-08

Integrated bondline spacers for wafer level packaged circuit devices

#24
20140048923
2014-02-20

Semiconductor package for high power devices

#25
20130307130
2013-11-21

Semiconductor device

#26
20130234313
2013-09-12

Grown carbon nanotube die attach structures, articles, devices, and processes for making them

#27
20130147016
2013-06-13

Semiconductor package having internal shunt and solder stop dimples

#28
20120319261
2012-12-20

Hermetically sealed wafer packages

#29
20120001316
2012-01-05

Package for high power devices

#30
20110316086
2011-12-29

Wafer scale package for high power devices

#31
20110103034
2011-05-05

ELECTRONIC CHIP AND SUBSTRATE PROVIDING INSULATION PROTECTION BETWEEN CONDUCTING NODES

#32
20110089575
2011-04-21

MULTICHIP PACKAGE AND METHOD OF MANUFACTURING THE SAME

#33
20090215230
2009-08-27

Manufacturing method of resin-sealed semiconductor device

#34
20090153765
2009-06-18

Wiring substrate and display device including the same

#35
20090096111
2009-04-16

Semiconductor device and method of manufacturing the same

#36
20090085227
2009-04-02

FLIP-CHIP MOUNTING BODY AND FLIP-CHIP MOUNTING METHOD

#37
20090039495
2009-02-12

WIRING SUBSTRATE AND DISPLAY DEVICE INCLUDING THE SAME

#38
20080272472
2008-11-06

Semiconductor packaging device comprising a semiconductor chip including a MOSFET

#39
20080157330
2008-07-03

Semiconductor device with chip mounted on a substrate

#40
20080150156
2008-06-26

Stacked die package with stud spacers

#41
20080113472
2008-05-15

Film and chip packaging process using the same

#42
20080061431
2008-03-13

Power semiconductor module

#43
20070229107
2007-10-04

Stacked integrated circuit package system with connection protection

#44
20070200223
2007-08-30

Semiconductor device and semiconductor module therewith

#45
20070184582
2007-08-09

Method of flip-chip mounting

#46
20070138651
2007-06-21

Package for high power density devices

#47
20070114553
2007-05-24

Optical module and method of manufacturing the same

#48
20070108574
2007-05-17

Chip stack package and manufacturing method thereof

#49
20070045807
2007-03-01

Microelectronic devices and methods for manufacturing microelectronic devices

#50
20060197211
2006-09-07

Semiconductor device and method of stacking semiconductor chips

#51
20060097409
2006-05-11

Semiconductor device

#52
20060097391
2006-05-11

Semiconductor packaging device comprising a semiconductor chip including a MOSFET

#53
20060097374
2006-05-11

Multi chip package

#54
20060049528
2006-03-09

Semiconductor chip stack structure and method for forming the same

#55
20060038273
2006-02-23

Electronic packages with dice landed on wire bonds

#56
20060035408
2006-02-16

Methods for designing spacers for use in stacking semiconductor devices or semiconductor device components

#57
20060012040
2006-01-19

Semiconductor package

#58
20050127491
2005-06-16

Stacked die semiconductor device

#59
20050023670
2005-02-03

Semiconductor device and a method of manufacturing the same

#60
15371889
2018-03-13

Semiconductor packages