211376 ⎘
Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by; Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector; Bonding techniques; Direct bonding, i.e. joining surfaces by means of intermolecular attracting interactions at their interfaces, e.g. covalent bonds, van der Waals forces between electrically conductive surfaces, e.g. copper-copper direct bonding, surface activated bonding
Systems and Methods for Forming Thermal Interface Material on Substrates
#2ENHANCED THERMAL SOLUTION FOR STACKED CACHE DIE CONFIGURATION
#3SEMICONDUCTOR PACKAGE AND METHOD OF FORMING THE SAME
#4SEMICONDUCTOR MODULE INCLUDING A CORNER DIE OVER A SIDE OF A SEMICONDUCTOR DIE, PACKAGE STRUCTURE INCLUDING THE SEMICONDUCTOR MODULE AND METHODS OF FORMING THE SAME
#5SEMICONDUCTOR CHIP, SEMICONDUCTOR PACKAGE, AND SEMICONDUCTOR CHIP MANUFACTURING METHOD
#6PACKAGES FORMED USING RDL-LAST PROCESS
#7NANOWIRE BONDING INTERCONNECT FOR FINE-PITCH MICROELECTRONICS
#8PROCESSED STACKED DIES
#9PACKAGE STRUCTURE AND METHOD OF FORMING THE SAME
#10CHEMICAL MECHANICAL POLISHING FOR HYBRID BONDING
#11THERMAL SOLUTIONS FOR ADVANCED SEMICONDUCTORS
#12PACKAGE STRUCTURE AND METHOD OF FORMING THE SAME
#13GATE LINE STRUCTURE TO REDUCE WAFER BOW
#14ASSEMBLY OF INTEGRATED CIRCUIT WAFERS
#15SIP-TYPE ELECTRONIC DEVICE AND METHOD FOR MAKING SUCH A DEVICE
#16METHODS OF FORMING MICROELECTRONIC DEVICES
#17METHODS OF FORMING MICROELECTRONIC DEVICES
#18MACROCHIP WITH INTERCONNECT STACK FOR POWER DELIVERY AND SIGNAL ROUTING
#19Processed stacked dies
#20Packages Formed Using RDL-Last Process
#21CHEMICAL MECHANICAL POLISHING FOR HYBRID BONDING
#22Semiconductor device and method for manufacturing the same
#23Nanowire bonding interconnect for fine-pitch microelectronics
#24SEMICONDUCTOR DEVICES AND PROCESSES
#25Microelectronic devices and electronic systems
#26Microelectronic devices and electronic systems
#27Three-dimensional memory devices and methods for forming the same
#28Manufacturing method of semiconductor apparatus and semiconductor apparatus
#29Dielectric-dielectric and metallization bonding via plasma activation and laser-induced heating
#30Bonding structures and methods for forming the same
#31BONDING APPARATUS, BONDING SYSTEM, AND BONDING METHOD
#32Method of manufacturing a semiconductor device including bonding layer and adsorption layer
#33SEMICONDUCTOR STRUCTURE AND METHOD OF FABRICATING THE SAME
#34Seal ring structures and methods of forming same
#35Method of manufacturing die stack structure
#36Raised via for terminal connections on different planes
#37Dielectric and metallic nanowire bond layers
#38Bonded unified semiconductor chips and fabrication and operation methods thereof
#39Method for forming a three-dimensional (3D) memory device having bonded semiconductor structures
#40Mixed hybrid bonding structures and methods of forming the same
#41Electrical connecting structure having nano-twins copper
#42System on integrated chips and methods of forming same
#43Semiconductor device and method of manufacturing semiconductor device
#44Bonded semiconductor devices having programmable logic device and NAND flash memory and methods for forming the same
#45Integration of three-dimensional NAND memory devices with multiple functional chips
#46Bonded semiconductor devices having processor and NAND flash memory and methods for forming the same
#47Semiconductor structure and method of fabricating the same
#48Three-dimensional memory device with embedded dynamic random-access memory
#49Method of manufacturing an electronic device
#50Bonded three-dimensional memory devices having bonding layers
#51Bonded three-dimensional memory devices and methods for forming the same
#52Processed stacked dies
#53Mixed hybrid bonding structures and methods of forming the same
#54Semiconductor device and method for manufacturing the same
#55Manufacturing method of semiconductor apparatus and semiconductor apparatus
#56Chemical mechanical polishing for hybrid bonding
#57Semiconductor devices including bonding layer and adsorption layer
#58Hybrid bonding using dummy bonding contacts
#59Electrical connecting structure having nano-twins copper and method of forming the same
#60Method for forming hybrid-bonding structure
#61Selectively bonding light-emitting devices via a pulsed laser
#62Dielectric-dielectric and metallization bonding via plasma activation and laser-induced heating
#63Curing pre-applied and plasma-etched underfill via a laser
#64Employing deformable contacts and pre-applied underfill for bonding LED devices via lasers
#65Display device and its process for curing post-applied underfill material and bonding packaging contacts via pulsed lasers
#66Memory arrays with bonded and shared logic circuitry
#67Semiconductor structure, 3DIC structure and method of fabricating the same
#68Packages formed using RDL-last process
#69Seal ring structures and methods of forming same
#70Three-dimensional memory device with embedded dynamic random-access memory
#71Integration of three-dimensional NAND memory devices with multiple functional chips
#72Dielectric and metallic nanowire bond layers
#73Method of restricting micro device on conductive pad
#74Method of liquid assisted binding
#75Nanowire bonding interconnect for fine-pitch microelectronics
#76Raised via for terminal connections on different planes
#77Hybrid bonding using dummy bonding contacts
#78Enhanced adhesive materials and processes for 3D applications
#79System on integrated chips and methods of forming same
#80Methods for bonding substrates
#81Power electronic assemblies with high purity aluminum plated substrates
#82Packages formed using RDL—last process
#83System and method for providing 3D wafer assembly with known-good-dies
#84ELECTRIC MODULE, ENDOSCOPE, AND METHOD FOR MANUFACTURING ELECTRIC MODULE
#85Raised via for terminal connections on different planes
#86Die stack structure with hybrid bonding structure and method of fabricating the same and package
#87ROOM TEMPERATURE METAL DIRECT BONDING
#88Seal ring structures and methods of forming same
#89Semiconductor device including conductive spacer with small linear coefficient
#90Optoelectronic component and method for producing an optoelectronic component
#91Packages formed using RDL-last process
#92Chemical mechanical polishing for hybrid bonding
#93System on integrated chips and methods of forming same
#94Semiconductor device
#95Packages formed using RDL-last process
#96Strong, heat stable junction
#97Enhanced adhesive materials and processes for 3D applications
#98Processed stacked dies
#99Approach to the manufacturing of monolithic 3-dimensional high-rise integrated-circuits with vertically-stacked double-sided fully-depleted silicon-on-insulator transistors
#100Wafer bonding methods and wafer-bonded structures
#101Metal line design for hybrid-bonding application
#102Method of bonding semiconductor substrates
#103Raised via for terminal connections on different planes
#104Seal ring structures and methods of forming same
#105Self healing compute array
#106System and method for providing 3D wafer assembly with known-good-dies
#107Electrical interconnect structure for an embedded electronics package
#1083D bonded semiconductor structure with an embedded capacitor
#109APPARATUS AND METHODS FOR MICRO-TRANSFER-PRINTING
#110Semiconductor structure and method of manufacturing the same
#111Systems of bonded substrates and methods for bonding substrates with bonding layers
#112Method for direct adhesion via low-roughness metal layers
#113APPARATUS AND METHODS FOR MICRO-TRANSFER-PRINTING
#114Semiconductor structure and method of manufacturing the same
#115SYSTEM AND METHOD FOR PROVIDING 3D WAFER ASSEMBLY WITH KNOWN-GOOD-DIES
#116Enhanced adhesive materials and processes for 3D applications
#117Apparatus and methods for micro-transfer-printing
#118Device and method for permanent bonding
#119Vertically integrated wafers with thermal dissipation
#120Methods for directly bonding silicon to silicon or silicon carbide to silicon carbide
#121Packaging structure of substrates connected by metal terminals
#122Process for producing a structure by assembling at least two elements by direct adhesive bonding
#123Systems of bonded substrates and methods for bonding substrates with bonding layers
#124Multi-wafer stacking by Ox-Ox bonding
#125Method for transferring a thin layer with supply of heat energy to a fragile zone via an inductive layer
#126Manufacturing method of forming a semiconductor wafer structure
#127Laser welding method
#128METHODS FOR CONSTRUCTING THREE DIMENSIONAL (3D) INTEGRATED CIRCUITS (ICs) (3DICs) AND RELATED SYSTEMS
#129Semiconductor device and manufacturing method therefor
#130Method for manufacturing semiconductor device with metal-containing film layer at bonding surface thereof
#131Direct metal bonding method
#132Method for assembling two substrates of different natures via a ductile intermediate layer
#133Metal to metal bonding for stacked (3D) integrated circuits
#134Metal to metal bonding for stacked (3D) integrated circuits
#135Metal to metal bonding for stacked (3D) integrated circuits
#136Metal to metal bonding for stacked (3D) integrated circuits
#137Room temperature metal direct bonding
#138Electrical interconnect structure for an embedded semiconductor device package and method of manufacturing thereof
#139Apparatus and methods for micro-transfer-printing
#140Apparatus and methods for micro-transfer-printing
#141Apparatus and methods for micro-transfer-printing
#142Apparatus and methods for micro-transfer-printing
#143Methods of forming III-V semiconductor structures using multiple substrates, and semiconductor devices fabricated using such methods
#144Method for producing composite structure with metal/metal bonding
#145Laser welding method, laser welding jig, and semiconductor device
#146Methods and configuration for manufacturing flip chip contact (FCC) power package
#147Vertical LED chip package on TSV carrier
#148Metal to metal bonding for stacked (3D) integrated circuits
#149Room temperature metal direct bonding
#150Chip package structure and manufacturing method thereof
#151Method of bonding semiconductor elements and junction structure
#152Semiconductor device and production method therefor
#153Semiconductor wafer and laminate structure including the same
#154Chip package structure and manufacturing method thereof
#155Chip package structure and manufacturing method thereof
#156Method for fabricating 3D integrated circuit device using interface wafer as permanent carrier
#1573D integrated circuit device having lower-cost active circuitry layers stacked before higher-cost active circuitry layer
#158Method of manufacturing optical module
#159METHOD OF JOINING METAL
#160Vertical LED chip package on TSV carrier
#161Room temperature metal direct bonding
#162Method for fabricating a 3D integrated circuit device having lower-cost active circuitry layers stacked before higher-cost active circuitry layer
#163Semiconductor device and production method therefor
#1643D integrated circuit device fabrication using interface wafer as permanent carrier
#165Wafer level package structure and production method therefor
#166Room temperature metal direct bonding
#167Joining method and joining device
#168Room temperature metal direct bonding
#169Bonding process with inhibited oxide formation
#170Bonding process with inhibited oxide formation
#171Three-dimensional memory devices having transferred interconnect layer and methods for forming the same
#172Bonding process with inhibited oxide formation
#173Bonding process with inhibited oxide formation
#174Vertically stacked wafers and methods of forming same
#175Inverse diode stack
#176Semiconductor packages
#177Bonded semiconductor structure and method for forming the same
#1783D bonded semiconductor structure with an embedded capacitor
#179Method to achieve ultra-high chip-to-chip alignment accuracy for wafer-to-wafer bonding process