ClassID:

207801

H01L24/23 - CPC Classification

Classification description:

Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto; Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto; High density interconnect [HDI] connectors; Manufacturing methods related thereto Structure, shape, material or disposition of the high density interconnect connectors after the connecting process

Sub-classes:
Recent Application in this class:
#1
20250266417
2025-08-21

SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF

#2
20240347457
2024-10-17

PITCH TRANSLATION ARCHITECTURE FOR SEMICONDUCTOR PACKAGE INCLUDING EMBEDDED INTERCONNECT BRIDGE

#3
20240088124
2024-03-14

Semiconductor structure and manufacturing method thereof

#4
20240006365
2024-01-04

Manufacturing method of semiconductor package structure

#5
20230369152
2023-11-16

Package and package-on-package structure having elliptical columns and ellipsoid joint terminals

#6
20230352451
2023-11-02

THREE-DIMENSIONAL FAN-OUT MEMORY POP STRUCTURE AND PACKAGING METHOD THEREOF

#7
20230290728
2023-09-14

Pitch translation architecture for semiconductor package including embedded interconnect bridge

#8
20220301964
2022-09-22

Package and package-on-package structure having elliptical columns and ellipsoid joint terminals

#9
20220285241
2022-09-08

METHOD OF FORMING SEMICONDUCTOR PACKAGES HAVING THERMAL THROUGH VIAS (TTV)

#10
20220271024
2022-08-25

Semiconductor structure and manufacturing method thereof

#11
20220148968
2022-05-12

Pitch translation architecture for semiconductor package including embedded interconnect bridge

#12
20220045025
2022-02-10

Semiconductor package structure and manufacturing method thereof

#13
20210183784
2021-06-17

Substrate having electronic component embedded therein

#14
20200373219
2020-11-26

Semiconductor packages having thermal through vias (TTV)

#15
20200357785
2020-11-12

Semiconductor structure and manufacturing method thereof

#16
20200235051
2020-07-23

Pitch translation architecture for semiconductor package including embedded interconnect bridge

#17
20200194326
2020-06-18

Package and package-on-package structure having elliptical columns and ellipsoid joint terminals

#18
20190206792
2019-07-04

Pitch translation architecture for semiconductor package including embedded interconnect bridge

#19
20190130152
2019-05-02

Fan-out semiconductor package

#20
20180204828
2018-07-19

Semiconductor structure and manufacturing method thereof

#21
20180199438
2018-07-12

Electronic device with embedded component carrier

#22
20160270221
2016-09-15

Resin multilayer substrate and component module

#23
20160247763
2016-08-25

High density substrate interconnect formed through inkjet printing

#24
20150228568
2015-08-13

Fan-out high-density packaging methods and structures

#25
20120319254
2012-12-20

Wiring board with built-in semiconductor element

#26
16521526
2020-08-25

Semiconductor package and method for manufacturing the same