ClassID:

207998

H01L27/11213 - CPC Classification

Classification description:

Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration including field-effect components; Read-only memory structures [ROM] and multistep manufacturing processes therefor ROM only

Recent Application in this class:
#1
20220310537
2022-09-29

SEMICONDUCTOR MEMORY DEVICES AND METHODS OF MANUFACTURING THEREOF

#2
20210391356
2021-12-16

Integrated circuit devices and fabrication techniques

#3
20200202966
2020-06-25

Electronic chip memory

#4
20200126905
2020-04-23

Method of fabricating a memory device having multiple metal interconnect lines

#5
20200035302
2020-01-30

3D SRAM/ROM with several superimposed layers and reconfigurable by transistor rear biasing

#6
20190333919
2019-10-31

Apparatus for High Speed ROM Cells

#7
20190267404
2019-08-29

Integrated circuit devices and fabrication techniques

#8
20190180815
2019-06-13

Bi-sided pattern processor

#9
20190147919
2019-05-16

Apparatus for high speed ROM cells

#10
20180337121
2018-11-22

Memory array structure having multiple bit lines

#11
20170236826
2017-08-17

Integrated circuit devices and fabrication techniques

#12
20170221529
2017-08-03

Compact three-dimensional memory with an above-substrate decoding stage

#13
20170221528
2017-08-03

Compact three-dimensional memory with semi-conductive address line portion

#14
20170170186
2017-06-15

ROM segmented bitline circuit

#15
20170092599
2017-03-30

Semiconductor device having features to prevent reverse engineering

#16
20170025185
2017-01-26

Method to program bitcells of a ROM array

#17
20160293614
2016-10-06

Mask read-only memory array, memory device, and fabrication method thereof

#18
20160049412
2016-02-18

Apparatus for high speed ROM cells

#19
20150325597
2015-11-12

FinFETs suitable for use in a high density SRAM cell

#20
20150214277
2015-07-30

Small-grain three-dimensional memory

#21
20140231921
2014-08-21

Apparatus for high speed ROM cells

#22
20140217484
2014-08-07

One-time programmable memory and method for making the same

#23
20130258749
2013-10-03

Apparatus for high speed ROM cells

#24
20110108902
2011-05-12

Memory with a read-only EEPROM-type structure

#25
20110006352
2011-01-13

Reverse engineering resistant read only memory

#26
20080206946
2008-08-28

Method of fabricating memory including diode

#27
20070128813
2007-06-07

Silicon-on-insulator (SOI) read only memory (ROM) array and method of making a SOI ROM

#28
20070057323
2007-03-15

Silicon-on-insulator (SOI) Read Only Memory (ROM) array and method of making a SOI ROM

#29
20060049400
2006-03-09

Semiconductor device

#30
20050269646
2005-12-08

Memory device

#31
20050205943
2005-09-22

Memory having reduced memory cell size

#32
20050111250
2005-05-26

High density memory array

#33
20050106839
2005-05-19

Transfer method, method of manufacturing thin film devices, method of maufacturing integrated circuits, circuit board and manufacturing method thereof, electro-optical apparatus and manufacturing method thereof, IC card, and electronic appliance