221835 ⎘
Logic circuits, i.e. having at least two inputs acting on one output ; Inverting circuits Fail-safe circuits
Sub-classes:FAILSAFE INPUT-OUTPUT CIRCUIT
#2MODULE WITH SELECTABLE DIGITAL OUTPUTS
#3SEMICONDUCTOR APPARATUS
#4ULTRASOUND BEAM QUALITY TEST APPARATUS AND METHODS
#5Fail-safe protection architecture for high voltage tolerant input/output circuit
#6Gate bias stabilization techniques
#7Trim/test interface for devices with low pin count or analog or no-connect pins
#8Pad-tracking circuit design to prevent leakage current during power ramp up or ramp down of output buffer
#9Trim/test interface for devices with low pin count or analog or no-connect pins
#10Self-isolating output driver
#11Fault detection circuit for a PWM driver, related system and integrated circuit
#12Failsafe device
#13Failsafe, ultra-wide voltage input output interface using low-voltage gate oxide transistors
#14Programmable Circuit Having Multiple Sectors
#15Fault detection circuit for a PWM driver, related system and integrated circuit
#16Monitoring device and motor vehicle including the same
#17Digital integrated circuit protected from transient errors
#18Scannable data synchronizer
#19Tristate and cross current free output buffer
#20Circuit and method for checking the integrity of a control signal
#21Fault detection circuit for a PWM driver, related system and integrated circuit
#22Dynamic fail-safe biasing circuitry for fault-tolerant applications
#23Safety switching device with failsafe inputs
#24Fail-safe device corresponding apparatus and vehicle
#25Fail-safe circuit
#26Programmable circuit having multiple sectors
#27High voltage fail-safe IO design using thin oxide devices
#28Method to achieve true fail safe compliance and ultra low pin current during power-up sequencing for mobile interfaces
#29Non-volatile electronic logic module
#30Wafer-level stacked chip assembly and chip layer utilized for the assembly
#31Eight transistor soft error robust storage cell
#32Controlling voltage at pad
#33Method and apparatus to recover from an erroneous logic state in an electronic system
#34Detection of single bit upset at dynamic logic due to soft error in real time
#35Radiation hardened circuit design for multinode upsets
#36Nuclear reactor automatic depressurization system
#37Element controller for a resilient integrated circuit architecture
#38Reconfigurable integrated circuit architecture with on-chip configuration and reconfiguration
#39Multi-context configurable memory controller
#40Data-driven integrated circuit architecture
#41Hierarchically-scalable reconfigurable integrated circuit architecture with unit delay modules
#42Resilient integrated circuit architecture
#43Load driving device
#44Fault tolerant integrated circuit architecture
#45Interfacing between differing voltage level requirements in an integrated circuit system
#46System for detecting operating errors in integrated circuits
#47DEFECT-AND-FAILURE-TOLERANT DEMULTIPLEXER USING SERIES REPLICATION AND ERROR-CONTROL ENCODING
#48Element controller for a resilient integrated circuit architecture
#49Resilient integrated circuit architecture
#50Fault tolerant asynchronous circuits
#51Eight transistor soft error robust storage cell
#52Fail safe I/O driver with pad feedback slew rate control
#53Clock gating circuit having a selector that selects one of a control signal and a scan signal
#54Fault tolerant integrated circuit architecture
#55Drive circuit device for a power semiconductor, and signal transfer circuit device for use therein
#56Fault Tolerant Self-Correcting Non-Glitching Low Power Circuit for Static and Dynamic Data Storage
#57Low overhead soft error tolerant flip flop
#58APPARATUS, SYSTEM, AND METHOD FOR GROUNDING INTEGRATED CIRCUIT OUTPUTS
#59Preset circuit of audio power amplifier
#60Load driving device
#61Fault tolerant asynchronous circuits
#62Error correcting logic system
#63Element controller for a resilient integrated circuit architecture
#64Digital single event transient hardened register using adaptive hold
#65Redundancy in signal distribution trees
#66Error correcting logic system
#67Program binding system, method and software for a resilient integrated circuit architecture
#68Compiler system, method and software for a resilient integrated circuit architecture
#69Element controller for a resilient integrated circuit architecture
#70Semiconductor integrated circuit device with a fail-safe IO circuit and electronic device including the same
#71Resilient integrated circuit architecture
#72Fault tolerant integrated circuit architecture
#73Circuit and method for providing a fail-safe differential receiver
#74Semiconductor integrated circuit including a malfunction detection circuit, and a design method for the same
#75LOCAL CONTROLLER FOR RECONFIGURABLE PROCESSING ELEMENTS
#76Defect-and-failure-tolerant demultiplexer using series replication and error-control encoding
#77Fault tolerant asynchronous circuits
#78LOGIC-LATCHING APPARATUS FOR IMPROVING SYSTEM-LEVEL ELECTROSTATIC DISCHARGE ROBUSTNESS
#79Dual path redundancy with stacked transistor voting
#80Load fluctuation correction circuit, electronic device, testing device, and timing generating circuit
#81Redundancy in signal distribution trees
#82Error correcting logic system
#83Fail-safe method and circuit
#84Fail-safe circuit for a low voltage differential signaling receiver
#85Input and output circuit and self-biased circuit thereof
#86Complementary self-limiting logic
#87Radiation-hardened latch circuit
#88Diagnostic coverage of registers by software
#89Programmable IC with power fault tolerance
#90Programmable IC with safety sub-system
#91Safety hardware and/or software fault tolerance using redundant channels