ClassID:

221878

H03K19/018578 - CPC Classification

Classification description:

Logic circuits, i.e. having at least two inputs acting on one output ; Inverting circuits; Coupling arrangements; Interface arrangements using field effect transistors only; Coupling arrangements; Impedance matching circuits of complementary type, e.g. CMOS with at least one differential stage

Recent Application in this class:
#1
20260141944
2026-05-21

CLOCK DELAY COMPENSATION CIRCUIT AND MEMORY DEVICE INCLUDING THE SAME

#2
20250023568
2025-01-16

LEVEL SHIFTER CIRCUIT

#3
20230318604
2023-10-05

CONTROL CIRCUIT AND DRIVING CIRCUIT

#4
20220200615
2022-06-23

Reference buffer circuit, analog-to-digital converter system, receiver, base station and mobile device

#5
20220131543
2022-04-28

High-frequency high-linear input buffer differential circuit

#6
20210099172
2021-04-01

Semiconductor apparatus performing calibration operation and a semiconductor system using the same

#7
20170257098
2017-09-07

Differential driver with pull up and pull down boosters

#8
20170250520
2017-08-31

Termination voltage circuits

#9
20170026037
2017-01-26

Low-voltage differential signaling driving circuit

#10
20160211849
2016-07-21

Negative capacitance logic device, clock generator including the same and method of operating clock generator

#11
20160197598
2016-07-07

Driver circuit for signal transmission and control method of driver circuit

#12
20130321057
2013-12-05

Integrated circuit comprising at least one digital output port having an adjustable impedance, and corresponding adjustment method

#13
20130249603
2013-09-26

Method and apparatus for improving a load independent buffer

#14
20120235706
2012-09-20

High speed integrated circuit

#15
20120112794
2012-05-10

Differential driver with calibration circuit and related calibration method

#16
20120013380
2012-01-19

Apparatus for generating a plurality of different voltage level clock signals

#17
20100109704
2010-05-06

Differential on-line termination

#18
20100090722
2010-04-15

High speed integrated circuit

#19
20090066371
2009-03-12

Buffer circuit which occupies less area in a semiconductor device

#20
20080278473
2008-11-13

Source line driver and method for controlling slew rate according to temperature and display device including the source line driver

#21
20080068040
2008-03-20

Semiconductor device and impedance adjusting method thereof

#22
20080024162
2008-01-31

CONSTANT IMPEDANCE CMOS OUTPUT BUFFER

#23
20070290752
2007-12-20

Adjusting methods of arithmetic multiplying circuit, drive circuit, and phase margin

#24
20070236271
2007-10-11

Current controlled level shifter with signal feedback

#25
20070007993
2007-01-11

High speed integrated circuit

#26
20060290376
2006-12-28

High speed integrated circuit

#27
20060290375
2006-12-28

High speed integrated circuit

#28
20060245508
2006-11-02

Receiver circuit, differential signal receiver circuit, interface circuit, and electronic instrument

#29
20060145728
2006-07-06

System and method for high frequency, high output swing buffers

#30
20060055444
2006-03-16

Clock buffer circuit having predetermined gain with bias circuit thereof

#31
20060017462
2006-01-26

High speed integrated circuit

#32
20050127997
2005-06-16

Adjusting methods of arithmetic multiplying circuit, drive circuit, and phase margin

#33
16288786
2019-09-10

Reducing supply noise in current mode logic transmitters

#34
16146697
2019-10-29

Active low-power termination

#35
16113538
2019-04-30

Reducing supply noise in current mode logic transmitters

#36
16110937
2019-04-23

Unified low power bidirectional port

#37
15970630
2019-04-09

Reducing supply noise in current mode logic transmitters

#38
14631993
2016-04-12

Gated differential logic circuit