ClassID:

221905

H03K19/0941 - CPC Classification

Classification description:

Logic circuits, i.e. having at least two inputs acting on one output ; Inverting circuits using specified components using semiconductor devices using field-effect transistors using junction field-effect transistors of complementary type

Recent Application in this class:
#1
20250280603
2025-09-04

SEMICONDUCTOR DEVICE

#2
20240355833
2024-10-24

SEMICONDUCTOR DEVICE

#3
20230208423
2023-06-29

Systems and methods for quarter rate serialization

#4
20210167095
2021-06-03

Semiconductor device

#5
20200153433
2020-05-14

Adiabatic logic cell

#6
20190221259
2019-07-18

FPGA configuration cell utilizing NVM technology and redundancy

#7
20180083634
2018-03-22

Low leakage ReRAM FPGA configuration cell

#8
20170179959
2017-06-22

Low leakage ReRAM FPGA configuration cell

#9
20160028396
2016-01-28

High-performance low-power near-Vt resistive memory-based FPGA

#10
20150061727
2015-03-05

Analog signal compatible CMOS switch as an integrated peripheral to a standard microcontroller

#11
20140340118
2014-11-20

Tristate gate

#12
20130278068
2013-10-24

Voltage mode driver with current booster (VMDCB)

#13
20130181295
2013-07-18

Analog signal compatible CMOS switch as an integrated peripheral to a standard microcontroller

#14
20120050930
2012-03-01

VOL up-shifting level shifters

#15
20110133773
2011-06-09

High Performance Output Drivers and Anti-Reflection Circuits

#16
20090184734
2009-07-23

Method of Producing and Operating a Low Power Junction Field Effect Transistor

#17
20080294706
2008-11-27

Adder structure with midcycle latch for power reduction

#18
20070126478
2007-06-07

Method of producing and operating a low power junction field effect transistor

#19
20050201025
2005-09-15

Capacitor coupling circuits

#20
20050138103
2005-06-23

Adder structure with midcycle latch for power reduction