ClassID:

221938

H03K19/1732 - CPC Classification

Classification description:

Logic circuits, i.e. having at least two inputs acting on one output ; Inverting circuits using specified components using elementary logic circuits as components; Optimisation thereof by limitation or reduction of the pin/gate ratio

Recent Application in this class:
#1
20230291400
2023-09-14

Circuit structure for realizing circuit pin multiplexing

#2
20210210417
2021-07-08

INTEGRATED CIRCUIT, AND MOTOR DEVICE INCLUDING THE SAME

#3
20190244880
2019-08-08

Integrated circuit, and motor device including the same

#4
20190181862
2019-06-13

Circuit and system implementing a smart fuse for a power supply

#5
20170371824
2017-12-28

Bus sharing scheme

#6
20170040993
2017-02-09

Integrated circuit control of anti-series switches

#7
20160344390
2016-11-24

Routing and programming for resistive switch arrays

#8
20160315619
2016-10-27

Structure of multi-mode supported and configurable six-input LUT, and FPGA device

#9
20160293548
2016-10-06

Method and circuits for communication in multi-die packages

#10
20160118974
2016-04-28

Drive control method of power semiconductor module and control circuit of power semiconductor module

#11
20150356037
2015-12-10

Device and method to assign device pin ownership for multi-processor core devices

#12
20150002191
2015-01-01

Configurable decoder with applications in FPGAs

#13
20140247525
2014-09-04

Flexible, space-efficient I/O circuitry for integrated circuits

#14
20140246702
2014-09-04

Flexible, space-efficient I/O circuitry for integrated circuits

#15
20140246701
2014-09-04

Flexible, space-efficient I/O circuitry for integrated circuits

#16
20140225664
2014-08-14

Semiconductor circuit with electrical connections having multiple signal or potential assignments

#17
20140091728
2014-04-03

Method and apparatus for multiplexing pins of an integrated circuit

#18
20130162289
2013-06-27

Method and apparatus for configuring an integrated circuit

#19
20130027015
2013-01-31

Multi input circuit

#20
20130021093
2013-01-24

Dual-function integrated circuit

#21
20120235729
2012-09-20

INTEGRATED DEVICE AND METHOD OF REDUCING VOLTAGE DROPS ON A SUPPLY DISTRIBUTION METAL PATH OF A DEVICE

#22
20120112816
2012-05-10

Circuit and method for implementing power good and chip enable control by a multi-functional pin of an integrated circuit

#23
20120032701
2012-02-09

Four logic state voltage to two output decompressor IC

#24
20110309882
2011-12-22

Method and circuit for operating a power semiconductor component

#25
20110291739
2011-12-01

Multi-use input

#26
20110260752
2011-10-27

General purpose input/output pin mapping

#27
20110215835
2011-09-08

QUAD STATE LOGIC DESIGN METHODS, CIRCUITS AND SYSTEMS

#28
20110204960
2011-08-25

Fully featured control pin powered analog switch

#29
20110181351
2011-07-28

Application specific power controller configuration technique

#30
20110115475
2011-05-19

Electronic device and apparatus for identifying electronic product

#31
20110084724
2011-04-14

Universal pinout for both receiver and transceiver with loopback

#32
20110063017
2011-03-17

Semiconductor device

#33
20110032024
2011-02-10

Integrated circuit and related method for determining operation modes

#34
20110018587
2011-01-27

METHOD AND CIRCUIT FOR CONFIGURING PIN STATES

#35
20110001517
2011-01-06

Semiconductor device

#36
20100327915
2010-12-30

SEMICONDUCTOR DEVICE AND METHOD FOR RESETTING THE SAME

#37
20100302080
2010-12-02

Apparatus and method for processing parallel digital input signals from plurality of circuit breakers

#38
20100259297
2010-10-14

Quad to binary converter with directly connected and coupled outputs

#39
20100259279
2010-10-14

System and method for using an integrated circuit pin as both a current limiting input and an open-drain output

#40
20100180098
2010-07-15

Configurable decoder with applications in FPGAs

#41
20100169697
2010-07-01

Output pin expansion using shift register receiving data bit each software counted clock for parallel output strobe

#42
20100164538
2010-07-01

Semiconductor body, circuit arrangement having the semiconductor body and method

#43
20100103185
2010-04-29

Switch pin multiplexing

#44
20100052767
2010-03-04

SEMICONDUCTOR MODULE

#45
20090322306
2009-12-31

Dual use delay capacitor

#46
20090315587
2009-12-24

Key based pin sharing selection

#47
20090315586
2009-12-24

Setting operating mode of an interface using multiple protocols

#48
20090273101
2009-11-05

Apparatus and method for preventing configurable system-on-a-chip integrated circuits from beginning I/O limited

#49
20090225610
2009-09-10

INTEGRATED CIRCUIT THAT SELECTIVELY OUTPUTS SUBSETS OF A GROUP OF DATA BITS

#50
20090206877
2009-08-20

Quad state to two state interface circuitry with clock input

#51
20090189682
2009-07-30

Method and apparatus for mode selection for high voltage integrated circuits

#52
20090189661
2009-07-30

PULSE WIDTH MODULATION CONTROLLER AND THE CONTROLLING METHOD THEREOF

#53
20090045837
2009-02-19

Apparatus for dynamic deployment of pin functions on a chip

#54
20090033363
2009-02-05

Multi-function input terminal

#55
20080315915
2008-12-25

Semiconductor device

#56
20080297201
2008-12-04

Complex switch control system

#57
20080218001
2008-09-11

Method and apparatus for mode selection for high voltage integrated circuits

#58
20080211546
2008-09-04

Integrated driver circuit for LIN bus wherein circuit is operable between an older LIN bus specification or a newer LIN bus specification

#59
20080186074
2008-08-07

Circuit and method for reducing pin count of chip

#60
20080157812
2008-07-03

Chip with in-circuit programability

#61
20080144649
2008-06-19

Apparatus for multiplexing signals through I/O pins

#62
20080122494
2008-05-29

On-chip mode-setting circuit and method for a chip

#63
20080088345
2008-04-17

Binary boolean output on input with more than two states

#64
20080001631
2008-01-03

Common input/output terminal control circuit

#65
20070290731
2007-12-20

Low pin count reset configuration

#66
20070283052
2007-12-06

Dynamic peripheral function remapping to external input-output connections of an integrated circuit device

#67
20070277141
2007-11-29

Integrated circuit arrangement, and method for programming an integrated circuit arrangement

#68
20070220191
2007-09-20

Apparatus and method for preventing configurable system-on-a-chip integrated circuits from becoming I/O limited

#69
20070205821
2007-09-06

Integrated voltage switching circuit

#70
20070205804
2007-09-06

Multi-bit configuration pins

#71
20070182456
2007-08-09

Reducing Pin Count When the Digital Output is to be Provided in Differential or Single-ended Form

#72
20070176632
2007-08-02

Integrated circuit package, and a method for producing an integrated circuit package having two dies with input and output terminals of integrated circuits of the dies directly addressable for testing of the package

#73
20070171991
2007-07-26

Current mode differential signal transmitting circuit sharing a clock outputting unit

#74
20070146006
2007-06-28

Circuit for generating precision soft-start frequency for either value of address bit applied to external reset pin

#75
20070126473
2007-06-07

Power saving method in an integrated circuit programming and control circuit

#76
20070109016
2007-05-17

Circuit and method for contact pad isolation

#77
20070086254
2007-04-19

Integrated circuits with interchangeable connectors

#78
20070080715
2007-04-12

Operations with logical states from a four voltage level signal

#79
20070063729
2007-03-22

Negative voltage noise-free circuit for multi-functional pad

#80
20070018508
2007-01-25

Method and apparatus for mode selection for high voltage integrated circuits

#81
20060279325
2006-12-14

Input circuit for mode setting

#82
20060261856
2006-11-23

Semiconductor chip and semiconductor device incorporating the same

#83
20060255839
2006-11-16

Single pin for multiple functional control purposes

#84
20060244509
2006-11-02

Semiconductor integrated circuit, electronic device using the same, and controlling method of semiconductor integrated circuit

#85
20060220687
2006-10-05

Chip with adjustable pinout function and method thereof

#86
20060176076
2006-08-10

Communication device for a logic circuit

#87
20060176075
2006-08-10

Customizable and Programmable Cell Array

#88
20060132178
2006-06-22

Pin multiplexing

#89
20060123292
2006-06-08

Method and apparatus for multiplexing an integrated circuit pin

#90
20060087307
2006-04-27

Single pin multilevel integrated circuit test interface

#91
20060028242
2006-02-09

Customizable and programmable cell array

#92
20060007019
2006-01-12

Multi-bit digital input using a single pin

#93
20060007018
2006-01-12

Multi-bit digital input using a single pin

#94
20050267699
2005-12-01

Time constant based fixed parameter assignment

#95
20050253627
2005-11-17

Multi level fixed parameter assignment

#96
20050202798
2005-09-15

Method and circuit arrangement for switching an electronic circuit into a power-saving mode

#97
20050184398
2005-08-25

Daisy chaining of serial I/O interface on stacking devices

#98
20050179462
2005-08-18

Quad state memory with converter feedback, transmission, and clock circuitry

#99
20050099219
2005-05-12

Setting multiple chip parameters using one IC terminal

#100
20050073785
2005-04-07

Method and apparatus for mode selection for high voltage integrated circuits

#101
20050046443
2005-03-03

Input terminal with combined logic threshold and reset function

#102
20050024093
2005-02-03

Communication device for a logic circuit

#103
20050024086
2005-02-03

Customizable and programmable cell array

#104
20050015699
2005-01-20

Customizable and programmable cell array

#105
20050012520
2005-01-20

Array of programmable cells with customized interconnections

#106
20050001654
2005-01-06

Expanding module for serial transmission

#107
15873405
2019-04-30

Configuration pin-strapping

#108
15702750
2018-05-08

Pin allocation circuit