221951 ⎘
Logic circuits, i.e. having at least two inputs acting on one output ; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form; Structural details of logic blocks Macroblocks
RECONFIGURABLE ARRAY FOR ANALOG APPLICATIONS
#2Hybrid synchronous and asynchronous control for scan-based testing
#3Process of routing tile-to-tile interconnects of an FPGA, and method of manufacturing an FPGA
#4Method and apparatus for remote field programmable gate array processing
#5Process of routing tile-to-tile interconnects of an FPGA, and method of manufacturing an FPGA
#6Multiplication operations in memory
#7Configurable first in first out and deserializer circuitry
#8Hierarchical sort/merge structure using a request pipe
#9Buffer size optimization in a hierarchical structure
#10Method and apparatus for remote field programmable gate array processing
#11Field programmable object array having image processing circuitry
#12Field programmable logic array
#13INTEGRATED CIRCUIT AND ELECTRONIC APPARATUS
#14Multiplication operations in memory
#15Programmable logic integrated circuit, design support system, and configuration method
#16Apparatus for configurable interface and associated methods
#17Multiple-layer configuration storage for runtime reconfigurable systems
#18Integrated circuit device with programmable analog subsystem
#19Field programmable object array having image processing circuitry
#20Configurable logic circuit including dynamic lookup table
#21Multiplication operations in memory
#22Efficient constant multiplier implementation for programmable logic devices
#23Configuration context switcher with a latch
#24Configurable multiply-accumulate
#25Reconfigurable semiconductor device
#26Adaptive interface for coupling FPGA modules
#27PLD architecture for flexible placement of IP function blocks
#28Configurable embedded memory system
#29Configuration context switcher with a latch
#30Configuration context switcher
#31Embedded memory and dedicated processor structure within an integrated circuit
#32Field programmable gate array with integrated application specific integrated circuit fabric
#33PLD architecture for flexible placement of IP function blocks
#34Configuration context switcher with a clocked storage element
#35Adjustable interface buffer circuit between a programmable logic device and a dedicated device
#36Communication within an integrated circuit including an array of interconnected programmable logic elements
#37Configuration context switcher with a latch
#38Enhanced field programmable gate array
#39Configuration context switcher
#40Configurable field device for use in process automation systems
#41Field device for determining and monitoring process variable in process automation systems
#42System for the flexible configuration of functional modules
#43Configuration context switcher with a clocked storage element
#44Apparatus and method for forming a mixed signal circuit with fully customizable analog cells and programmable interconnect
#45EMBEDDED DIGITAL IP STRIP CHIP
#46Enhanced field programmable gate array
#47Digital signal processing circuitry with redundancy and bidirectional data paths
#48Modular digital signal processing circuitry with optionally usable, dedicated connections between modules of the circuitry
#49Field programmable gate array with integrated application specific integrated circuit fabric
#50Digital signal processing block with preadder stage
#51FPGA having a direct routing structure
#52Field programmable object array and video compression processor for video data compression
#53Flash-based FPGA with secure reprogramming
#54Programmable logic devices with function-specific blocks
#55Programmable system on a chip for power-supply voltage and current monitoring and control
#56Programmable system on a chip
#57PLD architecture for flexible placement of IP function blocks
#58Reading configuration data from internal storage node of configuration storage circuit
#59Configuration context switcher with a clocked storage element
#60Configuration context switcher with a latch
#61Programmable system on a chip for power-supply voltage and current monitoring and control
#62Wide range and dynamically reconfigurable clock data recovery architecture
#63Field programmable gate array with integrated application specific integrated circuit fabric
#64Programmable logic device with millimeter wave interface and method for use therewith
#65Clock-generator architecture for a programmable-logic-based system on a chip
#66FACE-TO-FACE BONDED I/O CIRCUIT DIE AND FUNCTIONAL LOGIC CIRCUIT DIE SYSTEM
#67Programmable system on a chip for temperature monitoring and control
#68System-on-a-chip integrated circuit including dual-function analog and digital inputs
#69INTEGRATED MULTI-FUNCTION ANALOG CIRCUIT INCLUDING VOLTAGE, CURRENT, AND TEMPERATURE MONITOR AND GATE-DRIVER CIRCUIT BLOCKS
#70TILEABLE FIELD-PROGRAMMABLE GATE ARRAY ARCHITECTURE
#71Non-volatile memory architecture for programmable-logic-based system on a chip
#72Enhanced field programmable gate array
#73ARCHITECTURE FOR FACE-TO-FACE BONDING BETWEEN SUBSTRATE AND MULTIPLE DAUGHTER CHIPS
#74Integrated circuit device having state-saving and initialization feature
#75Programmable system on a chip
#76Apparatus and method for implementing an analog-to-digital converter in programmable logic devices
#77Programmable system on a chip for power-supply voltage and current monitoring and control
#78Routing for Microprocessor Busses
#79Adjustable interface buffer circuit between a programmable logic device and a dedicated device
#80Programmable system on a chip for power-supply voltage and current monitoring and control
#81Programmable logic controller and related electronic devices
#82Programmable system on a chip
#83Programmable system on a chip for power-supply voltage and current monitoring and control
#84Reconfigurable IC that has sections running at different looperness
#85Clock data recovery circuitry associated with programmable logic device circuitry
#86Clock-generator architecture for a programmable-logic-based system on a chip
#87FPGA powerup to known functional state
#88Reconfigurable integrated circuit device to automatically configure an initialization circuit
#89System and method for design entry and synthesis in programmable logic devices
#90Programmable system on a chip for temperature monitoring and control
#91Reconfigurable IC that has sections running at different looperness
#92Specialized processing block for programmable logic device
#93PROGRAMMABLE SYSTEM ON A CHIP
#94System monitor in a programmable logic device
#95FREEWAY ROUTING SYSTEM FOR A GATE ARRAY
#96Circuit architecture for an integrated circuit
#97xB/yB coder programmed within an embedded array of a programmable logic device
#98FPGA powerup to known functional state
#99Programmable logic device architecture for accommodating specialized circuitry
#100System-on-a-chip integrated circuit including dual-function analog and digital inputs
#101System monitor in a programmable logic device
#102Look-up table based logic macro-cells
#103Versatile RAM for a programmable logic device
#104Systems and methods for programming large-scale field-programmable analog arrays
#105Non-volatile memory architecture for programmable-logic-based system on a chip
#106Configurable I/Os for multi-chip modules
#107Upgradeable and reconfigurable programmable logic device
#108Programmable logic devices with function-specific blocks
#109Method and apparatus for universal program controlled bus architecture
#110Apparatus and methods for adjusting performance characteristics and power consumption of programmable logic devices
#111APPARATUS AND METHODS FOR ADJUSTING PERFORMANCE CHARACTERISTICS OF CIRCUITRY IN PROGRAMMABLE LOGIC DEVICES
#112Integrated circuit including programmable logic and external-device chip-enable override control
#113Structured integrated circuit device
#114Programmable phase-locked loop circuitry for programmable logic device
#115Structured integrated circuit device
#116Look-up table based logic macro-cells
#117FPGA having a direct routing structure
#118Programmable system on a chip for power-supply voltage and current monitoring and control
#119Techniques for combining volatile and non-volatile programmable logic on an integrated circuit
#120Apparatus and methods for adjusting performance characteristics of programmable logic devices
#121Output reporting techniques for hard intellectual property blocks
#122Programmable logic device including multipliers and configurations thereof to reduce resource utilization
#123Programmable logic device with high speed serial interface circuitry
#124Programmable logic controller and related electronic devices
#125Face-to-face bonded I/O circuit die and functional logic circuit die system
#126Analog-to-digital converter for programmable logic
#127PLD architecture for flexible placement of IP function blocks
#128Structured integrated circuit device
#129Structured integrated circuit device
#130Programmable logic devices with multi-standard byte synchronization and channel alignment for communication
#131Compare, select, sort, and median-filter apparatus in programmable logic devices and associated methods
#132Configurable logic circuit
#133Reconfiguration port for dynamic reconfiguration
#134System monitor in a programmable logic device
#135Programmable system on a chip
#136Programmable logic device with high speed serial interface circuitry
#137Programmable phase-locked loop circuitry for programmable logic device
#138Reconfiguration of a programmable logic device using internal control
#139Upgradeable and reconfigurable programmable logic device
#140Multiplier-accumulator block mode splitting
#141Look-up table based logic macro-cells
#142Programmable logic device with cascading DSP slices
#143Programmable logic device with pipelined DSP slices
#144Programmable device with dynamic DSP architecture
#145System and method for design entry and synthesis in programmable logic devices
#146Programmable phase-locked loop circuitry for programmable logic device
#147Enhanced field programmable gate array
#148Programmable gate array and embedded circuitry initialization and processing
#149Programmable logic device including multipliers and configurations thereof to reduce resource utilization
#150Programmable logic devices with multi-standard byte synchronization and channel alignment for communication
#151Digital signal processing block with reduced pin count for fine-grained programmable gate architecture
#152Bridged integrated circuits
#153Bridged integrated circuits
#154Process of routing tile-to-tile interconnects of an FPGA, and method of manufacturing an FPGA
#155Bridged integrated circuits
#156Circuit for and method of accessing memory elements in an integrated circuit device
#157Virtual FPGA management and optimization system
#158Bridged integrated circuits
#159Multiple-layer configuration storage for runtime reconfigurable systems
#160System on chip and method of operating a system on chip