221960 ⎘
Logic circuits, i.e. having at least two inputs acting on one output ; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form; Structural details of configuration resources for security
STRONG PUF CIRCUIT CAPABLE OF IMPLEMENTING MULTI-BIT PARALLEL XOR OPERATIONS
#2Embedding Security into Ferroelectric FET Array via In-Situ Memory Operation
#3PHYSICALLY UNCLONABLE CELL WITH SINGLE TRANSISTOR TYPES TO IMPROVE VOLTAGE AND TEMPERATURE STABILITY
#4PHYSICALLY UNCLONABLE FUNCTION DEVICE
#5EMBEDDED NETWORK ON CHIP ACCESSIBLE TO PROGRAMMABLE LOGIC FABRIC OF PROGRAMMABLE LOGIC DEVICE IN MULTI-DIMENSIONAL DIE SYSTEMS
#6Apparatus and method for expanding round keys during data encryption
#7PHYSICAL UNCLONABLE FUNCTION DEVICE AND METHOD
#8Programmable stream switches and functional safety circuits in integrated circuits
#9CRYPTOGRAPHIC HARDWARE SHARING SYSTEMS AND METHODS
#10Generating physical unclonable function data from a transistor of a semiconductor device
#11METHOD FOR GENERATING A PHYSICAL UNCLONABLE FUNCTION RESPONSE
#12Differential programming of two-terminal memory with program detection and multi-path disablement
#13RECONFIGURABLE ARRAY FOR ANALOG APPLICATIONS
#14Supply voltage proportionality monitoring in a system-on-chip (SOC)
#15Semiconductor device
#16Circuit apparatus and methods for PUF source and generating random digital sequence
#17ATTESTATION LOGIC ON MEMORY FOR MEMORY DIE VERIFICATION
#18Reliable multi-information entropy physical unclonable function (PUF) for internet of things security
#19Physically unclonable function device
#20Embedded network on chip accessible to programmable logic fabric of programmable logic device in multi-dimensional die systems
#21Detection and mitigation of unstable cells in unclonable cell array
#22Environmentally dependent physically unclonable function device
#23Physical unclonable function (PUF)-based method for enhancing system reliability
#24Circuits and methods for supply voltage detection and timing monitoring
#25Three dimensional programmable logic circuit systems and methods
#26Physical unclonable function device and method
#27Systems and methods for security analysis of applications on user mobile devices while maintaining user application privacy
#28Circuit for physically unclonable function and a method to generate private key for secure authentication using a physically unclonable function cell
#29Key provisioning systems and methods for programmable logic devices
#30Failure characterization systems and methods for erasing and debugging programmable logic devices
#31Asset management systems and methods for programmable logic devices
#32Secure boot systems and methods for programmable logic devices
#33Reconfigurable logic circuit
#34Interface for parallel configuration of programmable devices
#35SELECTIVELY DISABLED OUTPUT
#36Physically unclonable camouflage structure and methods for fabricating same
#37Systems and methods for detecting and mitigating programmable logic device tampering
#38Reconfigurable physically unclonable functions based on analog non-volatile memories
#39Systems and methods for security analysis of applications on user mobile devices while maintaining user application privacy
#40Protecting obfuscated circuits against attacks that utilize test infrastructures
#41Transient electronic device with ion-exchanged glass treated interposer
#42Method and device to speed-up leakage based PUF generators under extreme operation conditions
#43Multi-chip structure having configurable network-on-chip
#44Non-volatile multiple time programmable integrated circuit system with selective conversion to one time programmable or permanent configuration bit programming capabilities and related methods
#45Self-limiting electrical triggering for initiating fracture of frangible glass
#46BITSTREAM SECURITY BASED ON NODE LOCKING
#47MINIMIZING INFORMATION LEAKAGE FROM COMBINATORIAL LOGIC
#48Systems and methods for security analysis of applications on user mobile devices while maintaining user application privacy
#49Method of forming a photodiode
#50Techniques for preventing voltage tampering of security control circuits
#51Validating an image for a reconfigurable device
#52Interface for parallel configuration of programmable devices
#53Current-mode PUF circuit based on reference current source
#54Systems and methods for dynamic voltage and frequency scaling in programmable logic devices
#55Embedded network on chip accessible to programmable logic fabric of programmable logic device in multi-dimensional die systems
#56Automatic reset filter deactivation during critical security processes
#57Self-limiting electrical triggering for initiating fracture of frangible glass
#58Threshold voltage defined switches for programmable camouflage gates
#59Minimizing information leakage from combinatorial logic
#60Method and device for generating a device-specific identifier, and devices comprising a personalized programmable circuit component
#61PHYSICAL UNCLONABLE FUNCTION CIRCUIT STRUCTURE
#62Logic encryption using on-chip memory cells
#63Power supply glitch detector
#64APPARATUS AND METHOD FOR GENERATING A KEY IN A PROGRAMMABLE HARDWARE MODULE
#65Programmable logic circuit and method for implementing a boolean function
#66Privately performing application security analysis
#67Systems and methods for detecting and mitigating of programmable logic device tampering
#68Sensor and heater for stimulus-initiated fracture of a substrate
#69Integrated circuit chip with reverse engineering prevention
#70Transient electronic device with ion-exchanged glass treated interposer
#71SELECTIVELY DISABLED OUTPUT
#72Physically unclonable camouflage structure and methods for fabricating same
#73Protection of an integrated circuit
#74APPARATUS AND METHOD FOR GENERATING DIGITAL VALUE
#75Circuit arrangement for a safety IandC system
#76Multi-topology logic gates
#77Stable probing-resilient physically unclonable function (PUF) circuit
#78Transient electronic device with ion-exchanged glass treated interposer
#79Minimizing information leakage from combinatorial logic
#80Physically unclonable camouflage structure and methods for fabricating same
#81Printed circuit board security using embedded photodetector circuit
#82Robust, low power, reconfigurable threshold logic array
#83Programming an electrical fuse with a silicon-controlled rectifier
#84Fault protection for clock tree circuitry
#85Apparatus and method for detecting and preventing laser interrogation of an FPGA integrated circuit
#86Thermally tempered glass substrate using CTE mismatched layers and paste mixtures for transient electronic systems
#87Apparatus and method for generating digital value
#88Chip and method for manufacturing a chip
#89Identification Circuit
#90Semiconductor device including fuse circuit
#91Security shield assembly
#92Configuration context switcher with a latch
#93Secret operations using reconfigurable logics
#94System and method for on demand, vanishing, high performance electronic systems
#95Nanoelectromechanical antifuse and related systems
#96Defense against counterfeiting using antifuses
#97Method and apparatus for authenticating a semiconductor die
#98SEMICONDUCTOR CHIP AND METHOD FOR GENERATING DIGITAL VALUE USING PROCESS VARIATION
#99Stressed substrates for transient electronic systems
#100SONOS FPGA architecture having fast data erase and disable feature
#101Semiconductor component and an operating method for a protective circuit against light attacks
#102Protecting data from decryption from power signature analysis in secure applications
#103Method and apparatus for supporting self-destruction function in baseband modem
#104Methods and systems for hardware piracy prevention
#105Reconfigurable multi-port physical unclonable functions circuit
#106Grouping of physically unclonable functions
#107Systems and methods for detecting and mitigating programmable logic device tampering
#108Charge distribution control for secure systems
#109Clocked charge domain logic
#110Apparatus and methods for a tamper resistant bus for secure lock bit transfer
#111Configuration context switcher with a latch
#112Configuration context switcher
#113Logic circuit for a semiconductor memory device, and method of managing an operation in the semiconductor memory device
#114RAM block designed for efficient ganging
#115Apparatus and method for generating digital value
#116Protecting data from decryption from power signature analysis in secure applications
#117Control system, logic module substrate, and logic FPGA
#118Systems and methods for detecting and mitigating programmable logic device tampering
#119Systems and methods for securing a programmable device against an over-voltage attack
#120Systems and methods for providing user-initiated latch up to destroy SRAM data
#121Semiconductor integrated circuit including memory cells having non-volatile memories and switching elements
#122Error detection and correction circuitry
#123Configuration context switcher with a clocked storage element
#124Semiconductor chip and method for generating digital value using process variation
#125Configuration context switcher with a latch
#126Enhanced field programmable gate array
#127Semiconductor device, information processing apparatus, and method for configuring circuits of semiconductor device
#128Programmable logic device having an embedded test logic with secure access control
#129Lightweight secure physically unclonable functions
#130Configuration context switcher
#131High utilization universal logic array with variable circuit topology and logistic map circuit to realize a variety of logic gates with constant power signatures
#132Lightweight secure physically unclonable functions
#133Configuration context switcher with a clocked storage element
#134Methods for Protecting Against Piracy of Integrated Circuits
#135Enhanced field programmable gate array
#136Programmable logic device having an embedded test logic with secure access control
#137Secure operation of programmable devices
#138Secure partitioning of programmable devices
#139Secure manufacturing of programmable devices
#140Flash-based FPGA with secure reprogramming
#141Device provided with rewritable circuit, updating system, updating method, updating program and integrated circuit
#142Reading configuration data from internal storage node of configuration storage circuit
#143Configuration context switcher with a clocked storage element
#144Configuration context switcher with a latch
#145FIELD PROGRAMMABLE GATE ARRAY INCLUDING A NONVOLATILE USER MEMORY AND METHOD FOR PROGRAMMING
#146Security element for an integrated circuit, integrated circuit including the same, and method for securing an integrated circuit
#147Method and device for programming anti-fuses
#148Enhanced field programmable gate array
#149Upgradeable and reconfigurable programmable logic device
#150Systems and methods for write protection of non-volatile memory devices
#151Techniques for combining volatile and non-volatile programmable logic on an integrated circuit
#152Field programmable gate arrays using both volatile and nonvolatile memory cell properties and their control
#153System for securely configuring a field programmable gate array or other programmable hardware
#154Configurable logic circuit
#155Systems and methods for write protection of non-volatile memory devices
#156Upgradeable and reconfigurable programmable logic device
#157Enhanced field programmable gate array
#158Security circuit for detecting physical attack on system semiconductor
#159PRNG-based chiplet to chiplet secure communication using counter resynchronization
#160Data processing engine array architecture with memory tiles
#161Memory access protection in programmable logic device
#162Method and device to speed-up leakage based PUF generators under extreme operation conditions
#163Integrated circuit physically unclonable function
#164Multi-port PUF circuit based on NMOS zero temperature coefficient point
#165Validating an image for a reconfigurable device
#166Selectively disabled output
#167Protection of an integrated circuit
#168Secure voltage regulator
#169Selectively disabled output
#170Soft dark bit masking with integrated load modulation and burn-in induced destabilization for physically unclonable function keys
#171Apparatuses and methods for implementing various physically unclonable function (PUF) and random number generator capabilities
#172Systems and methods for protecting data using reconfigurable logic paths
#173Protection against tamper using in-rush current
#174Chip or SoC including fusible logic array and functions to protect logic against reverse engineering
#175Method and apparatus for validating a system-on-chip based on a silicon fingerprint and a unique response code
#176Methods and circuits for protecting integrated circuits from reverse engineering
#177Circuits for and methods of providing isolation in an integrated circuit