221961 ⎘
Logic circuits, i.e. having at least two inputs acting on one output ; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form; Structural details of configuration resources for powering on or off
OUTPUT SWITCH MATRIX TO REALLOCATE PHASES ACROSS INDEPENDENT VOLTAGE RAILS
#2SEMICONDUCTOR DEVICE
#3EMBEDDED NETWORK ON CHIP ACCESSIBLE TO PROGRAMMABLE LOGIC FABRIC OF PROGRAMMABLE LOGIC DEVICE IN MULTI-DIMENSIONAL DIE SYSTEMS
#4Apparatus, memory device and method for storing parameter codes for asymmetric on-die-termination
#5Semiconductor device
#6POWER GATING CELL STRUCTURE
#7Data retention circuit and method
#8Power chip with a multi-function pin
#9Management of voltage regulator units in field programmable arrays
#10Method providing multiple functions to pins of a chip and system applying the method
#11Low-power retention flip-flop
#12Power supply switch circuit and operating method thereof
#13Signal generation circuit, micro-controller, and control method thereof
#14Control device and input-output interface unit
#15Apparatus, memory device and method for storing parameter codes for asymmetric on-die-termination
#16Embedded network on chip accessible to programmable logic fabric of programmable logic device in multi-dimensional die systems
#17Power gating cell structure
#18Power control device, driving module and switching power supply device
#19Power supply regulation for programmable logic devices
#20Semiconductor device
#21Field programmable transistor arrays
#22Power management for multi-dimensional programmable logic devices
#23Electrically programmable application-specific integrated circuit initialization engine
#24Data retention circuit
#25Method and system for providing regional electrical grid for power conservation in a programmable device
#26Power gating system and memory system including the power gating system
#27Method for static gate clamping in multi-output gate driver systems
#28Semiconductor device
#29Field programmable transistor arrays
#30Power management for multi-dimensional programmable logic devices
#31Field programmable transistor arrays
#32Compensation memory (CM) for power application
#33Embedded network on chip accessible to programmable logic fabric of programmable logic device in multi-dimensional die systems
#34FPGA having programmable powered-up/powered-down logic tiles, and method of configuring and operating same
#35Integrated circuits with programmable non-volatile resistive switch elements
#36Logic devices, digital filters and video codecs including logic devices, and methods of controlling logic devices
#37Live power on sequence for programmable devices on boards
#38Programmable logic device with integrated high voltage power FET
#39Controller, control method, and program for power cut state restoration
#40Compensation memory (CM) for power application
#41Multiplexer-memory cell circuit, layout thereof and method of manufacturing same
#42Semiconductor device
#43Semiconductor device
#44Programmable logic device with integrated high voltage power FET
#45Adaptive analog blocks with digital wrappers integrated onto programmable fabric
#46Power management integrated circuit integrating field effect transistors and programmable fabric
#47Multiplexer-memory cell circuit, layout thereof and method of manufacturing same
#48Programmable logic device
#49Power management system for integrated circuits
#50Fine-grained power gating in FPGA interconnects
#51Solving constraint satisfaction problems using a field programmable gate array
#52Method of driving semiconductor device
#53Monolithic integrated circuit die having modular die regions stitched together
#54Semiconductor device
#55Programmable logic circuit
#56Semiconductor device
#57Semiconductor device
#58Logic devices, digital filters and video codecs including logic devices, and methods of controlling logic devices
#59Programmable logic device and method for driving programmable logic device
#60Method of driving semiconductor device
#61Programmable logic device
#62Field programmable gate arrays using resistivity-sensitive memories
#63FIELD PROGRAMMABLE GATE ARRAY
#64Programmable logic device
#65Logic circuit
#66Semiconductor device
#67Programmable logic device
#68Semiconductor device with a storage circuit having an oxide semiconductor
#69Semiconductor device
#70Programmable logic device
#71Programmable logic device with a self-power down mechanism
#72Power control of an integrated circuit including an array of interconnected configurable logic elements
#73Semiconductor device
#74Semiconductor device, information processing apparatus, and method for configuring circuits of semiconductor device
#75Field programmable gate arrays using resistivity-sensitive memories
#76Programmable logic device with programmable wakeup pins
#77Programmable device, control method of device and information processing system
#78Field programmable gate arrays using resistivity sensitive memories
#79RECONFIGURABLE CIRCUIT, RESET METHOD, AND CONFIGURATION INFORMATION GENERATION DEVICE
#80PROGRAMMABLE ARRAY LOGIC CIRCUIT EMPLOYING NON-VOLATILE FERROMAGNETIC MEMORY CELLS
#81Field programmable gate arrays using resistivity sensitive memories
#82FIELD PROGRAMMABLE GATE ARRAY INCLUDING A NONVOLATILE USER MEMORY AND METHOD FOR PROGRAMMING
#83NON-VOLATILE MEMORY CONFIGURATION SCHEME FOR VOLATILE-MEMORY-BASED PROGRAMMABLE CIRCUITS IN AN FPGA
#84FPGA powerup to known functional state
#85Programmable array logic circuit employing non-volatile ferromagnetic memory cells
#86Reconfigurable integrated circuit device to automatically configure an initialization circuit
#87FIELD PROGRAMMABLE SEMICONDUCTOR OBJECT ARRAY INTEGRATED CIRCUIT
#88FPGA powerup to known functional state
#89Programmable array logic circuit employing non-volatile ferromagnetic memory cells
#90Self test structure for interconnect and logic element testing in programmable devices
#91Non-volatile memory configuration scheme for volatile-memory-based programmable circuits in an FPGA
#92Upgradeable and reconfigurable programmable logic device
#93Non-volatile memory configuration scheme for volatile-memory-based programmable circuits in an FPGA
#94Techniques for combining volatile and non-volatile programmable logic on an integrated circuit
#95Field programmable gate arrays using both volatile and nonvolatile memory cell properties and their control
#96Upgradeable and reconfigurable programmable logic device
#97Programmable array logic circuit employing non-volatile ferromagnetic memory cells
#98Programmable gate array and embedded circuitry initialization and processing
#99Programmable logic device with reduced power consumption
#100Programmable broadcast initialization of memory blocks
#101Transmitter for transmitting a duobinary signal
#102Output buffer circuit with non-target ODT function
#103Method and system for providing a programmable logic device having a configurable wireless communication block field
#104System and method for SoC power-up sequencing
#105Output buffer circuit with non-target ODT function
#106Low inrush circuit for power up and deep power down exit
#107Multiplexer-memory cell circuit, layout thereof and method of manufacturing same
#108Emulating power gating for a circuit design using a programmable integrated circuit
#109Programmable body bias power supply
#110Power distribution network IP block