Data transmission error reduction via automatic data sampling timing adjustment

Delay circuit and semiconductor device including same

Delay locked loop and method for setting a delay chain

Delay circuit, and testing apparatus

Integrated circuit with adaptive speed binning

Digital system, clock signal adjusting method for digital system, recording medium recording processing program executed in the adjusting method

Variable delay line with multiple hierarchy

Phase adjustment device, phase adjustment method, and semiconductor integrated circuit

Digital pulse-width modulator

Digital pulse width modulator

Variable delay circuitry

Circuit and method for determining optimal power and frequency metrics of an integrated circuit

Dynamic recalibration mechanism for elastic interface

System and method for calibrating the clock frequency of a clock generator unit over a data line

Use of analog-valued floating-gate transistors to match the electrical characteristics of interleaved and pipelined circuits

Semiconductor circuit, operating method for the same, and delay time control system circuit

Wide-range programmable delay line

Delay stage for a digital delay line

Variable delay line using two blender delays

Semiconductor integrated circuit

Multiple-input, single-exit delay line architecture

Programmable high-resolution timing jitter injectors high-resolution timing jitter injectors

Systems and methods for implementing delay line circuitry

Variable timing circuit

Variable delay circuit with faster delay data update

High speed fully scaleable, programmable and linear digital delay circuit

Apparatus and methods for adjusting performance of integrated circuits

Auto-calibration method for delay circuit

Multiphase waveform generator capable of performing phase calibration and related phase calibration method

Semiconductor device, semiconductor system, and digital delay circuit

Adjustable frequency delay-locked loop

Method and apparatus for data transfer using wideband bursts

Delay locked loop circuit capable of operating in a low frequency

Integratable, controllable delay device, use of a delay device, as well as an integratable multiplexer for use in a delay device

Programmable clock delay circuit

Clock generator with programmable non-overlapping-clock-edge capability

Duty adjustment circuit

System and method for implementing a micro-stepping delay chain for a delay locked loop

System and method for implementing a micro-stepping delay chain for a delay locked loop

Delay circuit and control method of the delay circuit

Output clock adjustment for a digital I/O between physical layer device and media access controller

Programmable direct interpolating delay locked loop

Spread spectrum clock generating circuit

Dual edge programmable delay unit

Programmable jitter signal generator

Vernier circuit for fine control of sample time

Selectable delay pulse generator

Pulse duty cycle automatic correction device and method thereof

Delay circuit and delay synchronization loop device

Variable delay element for use in delay tuning of integrated circuits

Large programmable delay at high frequency through aliasing

Low-offset subsampling phase detector and method thereof

Dynamic phase adjustment for high speed clock signals

INL detection and calibration for phase-interpolator

Time-adaptive RF hybrid filter structures

Clock calibration for data serializer

Digital clock generation apparatus and method

Fine-grained programmable delay and pulse shaping circuit

Apparatuses and methods for voltage dependent delay

Digital-to-time converter, time-to-digital converter, and converting method using the same

Capacitor ratio identification

Method and system for controller hold-margin of semiconductor memory device

Direct measurement delay calibration method and apparatus

Universal nonlinear variable delay filter

Anti-floating circuit

Skew control apparatus and algorithm using a low pass filter

Skew sensor with enhanced reliability

Dynamic control of edge shift for duty cycle correction

Precision microwave frequency synthesizer and receiver with delay balanced drift canceling loop

High speed SAR ADC using comparator output triggered binary-search timing scheme and bit-dependent DAC settling

Method and apparatus for clock frequency multiplier

Scalable interleaved digital-to-time converter circuit for clock generation

Synchronize-able modular physical layer architecture for scalable interface

Digital phase locked loop (PLL) system with frequency band jump in lock mode

Time shifter and method thereof

Linear progression delay register