AMPLIFIER USING VARYING PULSE WIDTHS

SEMICONDUCTOR DEVICE

On-Time Determination of a Power Converter

DUTY CYCLE CORRECTION CIRCUIT AND METHOD FOR OPERATING THE SAME

LOW-POWER LOW-AREA DEADTIME GENERATOR

Clock Generation Circuit With Time Delay Adjustment

PULSE GENERATOR AND METHOD

DIGITALLY CONTROLLED DELAY LINE WITH TUNABLE RANGES

Device and Method for Synchronizing A Data Input Signal and A Clock Input Signal

Data receiving apparatus and method having data valid window expanding mechanism

PULSE GENERATOR AND METHOD

SYSTEM AND METHODS FOR OVERSHOOT AND UNDERSHOOT REDUCTION IN PHASE INTERPOLATORS

SUPPRESSING SPURIOUS TONES RESULTING FROM THE REQUANTIZATION OF THE ACCUMULATED QUANTIZATION ERROR WHEN PERFORMING FRACTIONAL FREQUENCY DIVISION

Systems, Methods, and Devices of Droop Detector Circuitry

DIGITAL PHASE INTERPOLATOR

SYSTEM AND METHOD FOR DIGITAL COMMUNICATIONS

Device and Method for Signal Retiming

DELAY ELEMENT GAIN CALIBRATION

QUASI TRUE TIME DELAY

BATTERY CLUSTER CONTROL

INTEGRATED CIRCUIT WITH SHMOO DELAY CIRCUIT

USING TIME-TO-DIGITAL CONVERTERS TO DELAY SIGNALS WITH HIGH ACCURACY AND LARGE RANGE

DELAY-ADJUSTED DIGITAL-UNIT INTERFACE

SIGNAL TRANSMISSION THROUGH LONG DELAY LINES

Systems and Methods for Duty Cycle Measurement

DUTY CYCLE CORRECTION CIRCUIT

DELAY CIRCUIT, DRIVE APPARATUS, SEMICONDUCTOR APPARATUS AND DELAY METHOD

TIMING MARGIN SENSOR

Duty cycle monitoring method and apparatus for memory interface

GAIN CALIBRATION OF DIGITALLY CONTROLLED DELAY LINE

MULTI-STAGE DIGITALLY CONTROLLED DELAY LINE LINEARITY ENHANCING BY REDUNDANCY AND RANDOMIZATION

PHASE ERROR COMPENSATION CIRCUIT AND METHOD FOR COMPENSATING PHASE ERROR BETWEEN REFERENCE CLOCK AND FEEDBACK CLOCK

Compact digital delay locked loop

DELAY CONTROL CIRCUIT AND METHOD, AND SEMICONDUCTOR MEMORY

CLOCK CONTROL IN A SYSTEM ON A CHIP (SOC)

SEMICONDUCTOR DEVICE

Precision Microwave Frequency Synthesizer And Receiver With Delay Balanced Drift Canceling Loop

Calibration method and calibration apparatus for delay of quantum computer system

Dynamic Phase Adjustment for High Speed Clock Signals

DELAY CIRCUIT AND SEMICONDUCTOR MEMORY

Digital feedback based adaptive delay time control method and apparatus for high efficiency active rectifier

Clock domain crossing

Using time-to-digital converters to delay signals with high accuracy and large range

Phase interpolation device and multi-phase clock generation device

Integrated circuit

Programmable delay line with glitch suppression

Clock oscillator control circuit

Methods and apparatus for a direct current-direct current converter compatible with wide range system clock frequency

Methods and apparatus for adaptively controlling direct current-direct current converter precision

Phase rotator

Testable time-to-digital converter

Minimum intrinsic timing utilization auto alignment on multi-die system

Clock oscillator control circuit

Monotonic and glitch-free phase interpolator and communication device including the same

Programmable delay line with glitch suppression

Transceiver for transmission of BMC data through configurable channel of a USB type-C port

Delay control device and tunable delay device

Method and Apparatus for Cross Correlation

Apparatus and method for interpolating between a first signal and a second signal

Near constant delay comparator for closed-loop system

Bi-directional adaptive clocking circuit supporting a wide frequency range

Signal generation apparatus for time-of-flight camera with suppressed cyclic error

Systems and methods for duty cycle measurement

Systems and methods for generating a controllable-width pulse signal

Systems and methods for generating a controllable-width pulse signal

Multi-phase clock signal phase difference detection and calculation circuit and method and digital phase modulation system

TIME-DELAY CIRCUIT FOR A DIGITAL SIGNAL, PARTICULARLY FOR A CLOCK SIGNAL

Precision microwave frequency synthesizer and receiver with delay balanced drift canceling loop

Method and apparatus for cross correlation

High-speed interface apparatus and deskew method thereof

Systems and methods for generating a controllable-width pulse signal

Methods and apparatus to bypass sensed signals in power converters

Using time-to-digital converters to delay signals with high accuracy and large range

Digital interpolation of switch point to reduce switch point jitter

Symmetrical balanced c-element

Input/output circuit and method

Capacitor ratio identification

Circuits and methods for voltage detection in integrated circuits

Semiconductor device and system including the same

Delay cell and delay line having the same

Calibration of a delay circuit

Clock pulse generator

Near-field communication circuit and operation method of the same

Precision microwave frequency synthesizer and receiver with delay balanced drift canceling loop

Monotonic variable delay line

SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE INCLUDING A DELAY CIRCUIT

PULSE WIDTH MODULATOR APPARATUS WITH ENHANCED RESOLUTION

Information processing device, semiconductor device, and information processing method

High-speed interface apparatus and deskew method thereof

Adaptive DCO VF curve slope control

Clock distribution

Asynchronous clock signal generator and semiconductor device for correcting multi-phase signals using asynchronous clock signal

Variable delay circuit

Skew sensor with enhanced reliability

Skew sensor with enhanced reliability

Dynamic control of edge shift for duty cycle correction

Input/output circuit

High-speed interface apparatus and deskew method thereof

Double compression avoidance

Double compression avoidance

Optical driving device and optical communication system

Multi-phase clock generator

Digital Controlled Oscillator Based Clock Generator For Multi-Channel Design

Information processing device, semiconductor device, and information processing method

Photo-diode emulator circuit for transimpedance amplifier testing

Methods, systems, and apparatus for the improvement of signal integrity over an unbalanced differential channel

High speed SAR ADC using comparator output triggered binary-search timing scheme and bit-dependent DAC settling

Digital controlled delay line

Adaptive clocking scheme

Scalable interleaved digital-to-time converter circuit for clock generation

Time-based delay line analog to digital converter

Semiconductor device and system including the same

Clock generating circuit, serial-parallel conversion circuit, and information processing device

On-chip waveform measurement

On-chip waveform measurement

Clock synthesizer with integral non-linear interpolation (INL) distortion compensation

Time-based delay line analog-to-digital converter with variable resolution

Delay signal generating apparatus using glitch free digitally controlled delay line and associated delay signal generating method

Microcontroller with digital delay line analog-to-digital converters and digital comparators

Apparatus for interpolating between a first signal edge and a second signal edge, a method for controlling such apparatus, and an interpolation cell for a digital-to-time converter

Asynchronous clock signal generator and semiconductor device for correcting multi-phase signals using asynchronous clock signal

Frequency adjusting device and method for adjusting frequency

Method for operating a pulse generator for capacitive sensors, and pulse generator

Gate driver that drives with a sequence of gate resistances

Digital controlled oscillator based clock generator for multi-channel design

Gyro sensor apparatus

High speed interface apparatus and deskew method thereof

Efficient digital duty cycle adjusters

Circuit and method of operating circuit

Time-based delay line analog-to-digital converter with variable resolution

Microcontroller with digital delay line analog-to-digital converters and digital comparators

Gate driver that drives with a sequence of gate resistances

Ultra-fast autonomous clock monitoring circuit for safe and secure automotive applications

Fractional PLL using a linear PFD with adjustable delay

Delay Control Circuit

System and method for a reduced harmonic content transmitter for wireless communication

Test method of delay circuit including delay line

Semiconductor memory device for diminishing peak current in multi-die memory structure

High resolution time-to-digital convertor

Methods, systems, and apparatus for the improvement of signal integrity over an unbalanced differential channel

Frequency synthesizers with adjustable delays

PWM signal generator and switching power supply device having same

Clock gating using a delay circuit

Semiconductor device including delay circuit and operating method thereof

Input/output circuit

Programmable delay circuit for low power applications

Method for performing phase shift control for timing recovery in an electronic device, and associated apparatus

Input/output circuit

Adaptive clocking scheme

Circuit and method of operating circuit

Method for performing phase shift control in an electronic device, and associated apparatus

Linear progression delay register

Delay-locked loop arrangement and method for operating a delay-locked loop circuit

Modified flying adder architecture

Hold-time optimization circuit and receiver with the same

Phase interpolator with phase traversing for delay-locked loop

Fast settling mixed signal phase interpolator with integrated duty cycle correction

Self-adjusting clock doubler and integrated circuit clock distribution system using same

Semiconductor device and semiconductor system including the same

In-situ delay element calibration

Multi-output phase detector

Programmable delay circuit

Clock spurs reduction technique

Apparatuses and methods for delaying signals using a delay line with homogenous architecture and integrated measure initialization circuitry

Timing control circuit

Wave clocking

Multi-output phase detector

Clock feathered slew rate control system

Pre-heating for reduced subthreshold leakage

Multi-stage phase mixer circuit using fine and coarse control signals

Integrated circuit for preventing chip swapping and/or device cloning in a host device

Methods of on-chip memory partitioning and secure access violation checking in a system-on-chip

Systems and methods for distributing an aging burden among processor cores

Adaptive clocking scheme to accommodate supply voltage transients

Apparatus and method to update a default time interval based on process corner, temperature and voltage

Integrated circuit allowing to test a power management unit based on or more conditions and configuring the plurality of pins to operate in normal and test mode

Proactive Power Management Using a Power Management Unit

Scalable and configurable system on a chip interrupt controller

Clock signal multiplication to reduce noise coupled onto a transmission communication signal of a communications device

Electronics device capable of efficient communication between components with asyncronous clocks

Integrated circuit with an adaptable contact pad reconfiguring architecture

Integrated circuit with pre-heating for reduced subthreshold leakage

Wave clocking

Time-based apparatus and method to mitigate semiconductor aging effects

Semiconductor device

DELAY CONTROL DEVICE

On-Chip Self Calibrating Delay Monitoring Circuitry

On-chip self calibrating delay monitoring circuitry

Multi-phase clock generator and data transmission lines

Data output circuit of semiconductor apparatus

CLOCK DELAY CIRCUIT

Duty cycle correction circuit of semiconductor memory apparatus

Method and apparatus for improving accuracy of signals delay

Soft-switching control device and method of manufacturing the same

Frequency Divider, Frequency Dividing Method Thereof, and Phase Locked Loop Utilizing the Frequency Divider

Clock delay adjustment circuit for semiconductor integrated circuit and control method of the same

SEMICONDUCTOR BOOST CIRCUIT AND METHOD OF CONTROLLING THE SAME

High resolution clock signal generator

Semiconductor device

On-chip self calibrating delay monitoring circuitry

Synchronization of a data output signal to an input clock

DUTY CYCLE CORRECTION CIRCUIT AND METHOD FOR CORRECTING DUTY CYCLE AND SEMICONDUCTOR DEVICE INCLUDING THE DUTY CYCLE CORRECTION CIRCUIT

Digital pulse width modulator

Adaptive clock generators, systems, and methods

Phase generating apparatus and method thereof

Structure for a duty cycle correction circuit

Multiphase clock generation circuit

Delay line calibration mechanism and related multi-clock signal generator

Digital delay lines

Multiple-stage, signal edge alignment apparatus and methods

Method and apparatus for improving accuracy of signals delay

Circuit for changing frequency of a signal and frequency change method thereof

PROGRAMMABLE DELAY LINE CIRCUIT WITH GLITCH AVOIDANCE

Delay locked loop, electronic device including the same, and method of operating the same

Data delay control circuit and method

Device and method for detecting and correcting timing errors

Receiver circuit and data transmission system

Semiconductor device with integrated delay chain

Ring oscillator having wide frequency range

DELAY LINE

Digitally controlled oscillator with the wide operation range

Variable delay circuit, variable delay circuit controlling method, and input/output circuit

Duty control circuit and semiconductor device having the same

Digital pulse width modulator

Clock adjusting circuit and semiconductor integrated circuit device

Micro-phase adjusting and micro-phase adjusting mixer circuits designed with standard field effect transistor structures

Digital delay locked loop circuit

Variable delay apparatus

Solid-state image pickup apparatus

Asynchronous circuit insensitive to delays with time delay insertion circuit

Apparatus and methods for adjusting performance of integrated circuits

Selectable delay pulse generator

Delay line calibration mechanism and related multi-clock signal generator

Frequency divider, frequency dividing method thereof, and phase locked loop utilizing the frequency divider

Circuit and method for correcting duty cycle

Low power programmable clock delay generator with integrated decode function

Duty cycle correction circuit and semiconductor integrated circuit apparatus including the same

Delay device for adjusting phase SMIA standard

Variable delay circuit and delay amount control method

Timing control circuit, timing generation system, timing control method and semiconductor memory device

Delay circuit of delay locked loop having single and dual delay lines and control method of the same

Ring oscillator with constant gain

Scannable virtual rail ring oscillator circuit and system for measuring variations in device characteristics

High frequency digital oscillator-on-demand with synchronization

Circuit device and related method for mitigating EMI

Method and system for controlling a delay circuit for generation of signals up to extremely high frequencies

VARIABLE DELAY CIRCUIT, DELAY TIME CONTROL METHOD AND UNIT CIRCUIT

Variable delay circuit and delay correction method

Generic flexible timer design

Delaying stage selecting circuit and method thereof

MICRO-PHASE ADJUSTING AND MICRO-PHASE ADJUSTING MIXER CIRCUITS DESIGNED WITH STANDARD FIELD EFFECT TRANSISTOR STRUCTURES

Efficient delay elements

Method and apparatus for treating a signal

Programmable digital delay

Delay circuit and delay time adjustment method

METHOD AND APPARATUS FOR PROGRAMMABLE DELAY HAVING FINE DELAY RESOLUTION

METHOD AND APPARATUS OF A RING OSCILLATOR FOR PHASE LOCKED LOOP (PLL)

System for glitch-free delay updates of a standard cell-based programmable delay

Integrated circuit with a programmable delay and a method thereof

Circuit and method for correcting duty cycle

Duty cycle correcting circuit

Method and circuit for local clock generation and smartcard including it thereon

Structure for a duty cycle correction circuit

Delay circuit

Driver, and a semiconductor memory device having the same

APPARATUS AND METHOD FOR GENERATING A SUPPLY VOLTAGE-DEPENDENT CLOCK SIGNAL

Scannable virtual rail method and ring oscillator circuit for measuring variations in device characteristics

Design structure for a flexible multimode logic element for use in a configurable mixed-logic signal distribution path

Flexible multimode logic element for use in a configurable mixed-logic signal distribution path

PATH DELAY ADJUSTMENT CIRCUITRY USING PROGRAMMABLE DRIVER

Method and device for determining trim solution

Electronic Circuit Wherein an Asynchronous Delay is Realized

Data output strobe signal generating circuit and semiconductor memory apparatus having the same

Signal generating circuit

DELAY CIRCUIT AND DELAY SYNCHRONIZATION LOOP DEVICE

Method and apparatus for data transfer using a time division multiple frequency scheme supplemented with polarity modulation

METHOD AND SYSTEM FOR PROGRAMMABLE DELAYS ON TRANSPORT OUTPUTS

Clock generator with programmable non-overlapping-clock-edge capability

Delay control circuit

High performance, flexible programmable clock circuit

Differential ring oscillator

Circuit for controlling data output

Digital clock generator

Programmable trigger delays

Programmable delay circuit having reduced insertion delay

Digital-to-time converter

Arbitrary pulse generation

Data delay control circuit and method

Triggering events at fractions of a clock cycle

Data transfer using frequency notching of radio-frequency signals

Phase shifter

Voltage controlled oscillator with a multiple gate transistor and method therefor

Adjustable delay cells and delay lines including the same

Apparatus and methods for adjusting performance of integrated circuits

System and method for detecting processing speed of integrated circuit

Delay circuit and delay synchronization loop device

Delay circuit and delay synchronization loop device

Delay circuit and delay synchronization loop device

Duty cycle correction device

Controllable delay device