ClassID:

221501

H03K2005/00215 - CPC Classification

Classification description:

Manipulating of pulses not covered by one of the other main groups of this subclass; Delay, i.e. output pulse is delayed after input pulse and pulse length of output pulse is dependent on pulse length of input pulse; Layout of the delay element using FET's where the conduction path of multiple FET's is in parallel or in series, all having the same gate control

Recent Application in this class: