221505 ⎘
Manipulating of pulses not covered by one of the other main groups of this subclass; Delay, i.e. output pulse is delayed after input pulse and pulse length of output pulse is dependent on pulse length of input pulse; Layout of the delay element using circuits having two logic levels using shift registers
SIGNAL TRANSPORTING SYSTEM AND SIGNAL TRANSPORTING METHOD
#2DELAY CONTROL CIRCUIT AND METHOD, AND SEMICONDUCTOR MEMORY
#3Alarm systems and circuits
#4Delay circuit and clock error correction device including the same
#5Apparatuses and methods for delay control
#6Apparatuses and methods for adjusting a phase mixer circuit
#7Apparatuses and methods for delay control
#8Semiconductor device
#9Semiconductor device
#10Apparatuses and methods for adjusting a phase mixer circuit
#11Boost control signal generator
#12Techniques for reducing the effects of aging in logic circuits
#13Clock signal transmission circuit and driving method thereof, gate driving circuit, and display device
#14Electronic device and associated signal processing method
#15Delay circuit
#16Automatically placed-and-routed ADPLL with PWM-based DCO resolution enhancement
#17Distributing multiplexing logic to remove multiplexor latency on the output path for variable clock cycle, delayed signals
#18Semiconductor device including flip-flop and logic circuit
#19Reference signal generating circuit, ad conversion circuit, and imaging device
#20Filtering circuit and semiconductor integrated circuit having the same
#21Integrated circuit and programmable delay
#22Receiver circuit and data transmission system
#23Integrated circuit and programmable delay
#24Command decoder and command signal generating circuit
#25Device and method for generating clock signal
#26Timing control circuit, timing generation system, timing control method and semiconductor memory device
#27Method and apparatus for treating a signal
#28Clock generator for semiconductor memory apparatus
#29OSCILLATOR
#30DELAY CIRCUIT AND DELAY SYNCHRONIZATION LOOP DEVICE
#31System and method for multiple-phase clock generation
#32Clock generator for semiconductor memory apparatus
#33Triggering events at fractions of a clock cycle
#34Electrical circuit and method for testing electronic component
#35Delay circuit and delay synchronization loop device
#36Delay circuit and delay synchronization loop device
#37Delay circuit and delay synchronization loop device
#38Storage efficient sliding window sum
#39Frequency synthesizer, pulse train generation apparatus and pulse train generation method
#40Circuit arrangement
#41System and method for producing precision timing signals by controlling register banks to provide a phase difference between two signal paths
#42Semiconductor circuit
#43System and method generating a delayed clock output
#44Delay circuit and delay synchronization loop device