222018 ⎘
Pulse counters comprising counting chains; Frequency dividers comprising counting chains; Gating or clocking signals applied to all stages, i.e. synchronous counters using bi-stable regenerative trigger circuits Ring counters, i.e. feedback shift register counters
Sub-classes:SEMICONDUCTOR DEVICE
#2Frequency divider for non-overlapping clock signals
#3Network entities, methods, apparatuses and communications networks for authenticating an event
#4Data transmission circuit, display device and data transmission method
#5Device for delivering a signal switching from a first state to a second state
#6Event counter circuits using partitioned moving average determinations and related methods
#7Clock pulse generator
#8Techniques for clock signal jitter generation
#9Modulus divider with deterministic phase alignment
#10Apparatus and method for clock signal frequency division using self-resetting, low power, linear feedback shift register (LFSR)
#11Frequency-divider circuitry
#12FINGERPRINT RECOGNITION DEVICE FOR CAPACITANCE SENSING, USING DRIVER HAVING PIPELINE SCAN STRUCTURE
#13Method and apparatus for wirelessly activating a remote mechanism
#14Latch circuit, double data rate ring counter based on the latch circuit, hybrid counting device, analog-digital converting device, and CMOS image sensor
#15Resonant frequency divider design methodology for dynamic frequency scaling
#16Ring frequency divider
#17Frequency dividing circuit and semiconductor integrated circuit
#18Frequency divider and phase-locked loop including the same
#19Resonant frequency divider design methodology for dynamic frequency scaling
#20High-speed frequency divider
#21Shift frequency demultiplier
#22Method and apparatus for rapid synchronization of shift register related symbol sequences
#23High-speed frequency divider architecture
#24Display panel drive device
#25Phase lock loop having high frequency CMOS programmable divider with large divide ratio
#26Initializing a ring counter
#27Digital PLL circuit and clock generating method
#28Preventing metastability of a divide-by-two quadrature divider
#29Method and device for dividing a frequency signal
#30Counting circuit and address counter using the same
#31Shift frequency demultiplier with automatic reset function
#32Method and apparatus for rapid synchronization of shift register related symbol sequences
#33Divider circuit
#34Synchronization of a data output signal to an input clock
#35Frequency divider systems and methods thereof
#36Signal processing arrangement
#37Counting apparatus
#38Counting circuit and address counter using the same
#39Shift Register Turning On a Feedback Circuit According to a Signal From a Next Stage Shift
#40Frequency dividing circuit
#41Method and device for dividing a frequency signal
#42Frequency divider for wireless communication system and driving method thereof
#43Adaptive phase noise cancellation for fractional-N phase locked loop
#44Counting circuit and address counter using the same
#45Frequency divider circuit
#46Device and method for generating clock signal
#47MULTI-PHASE FREQUENCY DIVIDER
#48High frequency digital oscillator-on-demand with synchronization
#49Low latency counter event indication
#50System and method for low noise output divider and buffer having low current consumption
#51Signal generating apparatus, filter apparatus, signal generating method and filtering method
#52Frequency divider
#53Frequency divider
#54High-speed divider with reduced power consumption
#55Gated ring oscillator for a time-to-digital converter with shaped quantization noise
#56Low latency counter event indication
#57Low-power modulus divider stage
#58High speed dynamic frequency divider
#59Frequency dividing phase shift circuit
#60Shift register turning off a signal generating circuit according to a signal from a feedback circuit
#61Counter circuits and distance estimation methods
#62Frequency divider and an electronic device incorporating such a frequency divider
#63Frequency divider and associated methods
#64Semiconductor integrated circuit device
#65Frequency divider with slip
#66Digital clock dividing circuit
#67Reprogrammable bi-directional signal converter
#68Frequency divider with variable division rate
#69Divider circuit and oscillating circuit including the same
#70Local oscillator and mixer for transceiver
#71Application program interface for postal security device
#72Variable dividing circuit
#73Cryptographic machines characterized by a Finite Lab-Transform (FLT)
#74Linear feedback shift register-based clock signal generator, time domain-interleaved analog to digital converter and methods
#75Techniques for clock signal jitter generation
#76IC and a method for flexible integer and fractional divisions
#77Current reused stacked ring oscillator and injection locked divider, injection locked multiplier