ClassID:

221544

H03K5/1502 - CPC Classification

Classification description:

Manipulating of pulses not covered by one of the other main groups of this subclass; Arrangements in which pulses are delivered at different times at several outputs, i.e. pulse distributors with more than two outputs programmable

Recent Application in this class:
#1
20180367128
2018-12-20

Increasing resolution of on-chip timing uncertainty measurements

#2
20180351541
2018-12-06

Synchronous clock generation using an interpolator

#3
20180168012
2018-06-14

Phase controller apparatus and methods

#4
20180167061
2018-06-14

Circuits for delay mismatch compensation and related methods

#5
20180097512
2018-04-05

Synchronous clock generation using an interpolator

#6
20160191084
2016-06-30

Data transmitter, data receiver and smart device using the same

#7
20160172018
2016-06-16

Apparatuses and methods for capturing data using a divided clock

#8
20160072483
2016-03-10

Semiconductor device and method of controlling semiconductor device

#9
20150070065
2015-03-12

Signal-alignment circuitry and methods

#10
20140247317
2014-09-04

Clock signal generating circuit, image forming apparatus, and clock signal generating method of clock signal generating circuit

#11
20140002165
2014-01-02

Charge-domain filter and method thereof and clock generator

#12
20130120033
2013-05-16

Charge-domain filter and method thereof

#13
20100253408
2010-10-07

Timing generating circuit and phase shift circuit

#14
20090273366
2009-11-05

Semiconductor integrated circuit, semiconductor integrated circuit control method, and terminal system

#15
20090179680
2009-07-16

Method and apparatus for implementing balanced clock distribution networks on ASICs with voltage islands functioning at multiple operating points of voltage and temperature

#16
20060145744
2006-07-06

Use of analog-valued floating-gate transistors to match the electrical characteristics of interleaved and pipelined circuits