221547 ⎘
Manipulating of pulses not covered by one of the other main groups of this subclass; Arrangements in which pulses are delivered at different times at several outputs, i.e. pulse distributors with more than two outputs with asynchronously driven series connected output stages using a chain of active delay devices
Low-power inter-die communication using delay lines
#2Clockless delay adaptation loop for random data
#3Semiconductor integrated circuit and transmission device
#4Variable delay circuits
#5Implantable medical device having clock tree network with reduced power consumption
#6Multi-stage delay-locked loop phase detector
#7Clock delay adjustment circuit for semiconductor integrated circuit and control method of the same
#8Method and apparatus for minimizing skew between signals
#9Multi-mode circuit and a method for preventing degradation in the multi-mode circuit
#10A/D conversion circuit and solid state imaging device
#11Semiconductor integrated circuit having insulated gate field effect transistors
#12Ring-based multi-push voltage-controlled oscillator
#13Clock signal generation circuit
#14Semiconductor integrated circuit
#15TEST CIRCUIT AND TEST METHOD
#16Timer for low-power and high-resolution with low bits derived from set of phase shifted clock signals
#17Method and apparatus for calibrating a delay chain
#18Timing generator and semiconductor test apparatus
#19Multistage amplifier and a method of settling the multistage amplifier
#20Receiving apparatus and receiving method
#21Apparatus and method for generating multi-phase clocks
#22Noise reduction in digital systems when the noise is caused by simultaneously clocking data registers
#23NOISE REDUCTION IN DIGITAL SYSTEMS
#24Isophase Multiphase Clock Signal Generation Circuit and Serial Digital Data Receiving Circuit Using the Same
#25Clock generation circuit and method of generating clock signals
#26Delay circuit
#27Circuit and method for interpolative delay
#28Noise reduction in digital systems
#29Oscillator
#30Method and apparatus for frequency synthesis
#31Programmable high-resolution timing jitter injectors high-resolution timing jitter injectors
#32Clock distributor for use in semiconductor logics for generating clock signals when enabled and a method therefor
#33Oscillator
#34Phase multiplier circuit
#35Optical transmission system for compensating for transmission loss
#36Integrated circuit having reduced substate bounce
#37Method and apparatus for controlling slew
#38Low-power inter-die communication using delay lines
#39Clockless delay adaptation loop for random data
#40Pulse width recovery in clock dividers