Time-interleaved clock-data recovery and method thereof

Delay stage-interweaved analog DLL/PLL

Frequency synthesizer applied to a digital television tuner

Clock generation circuit and clock generation control circuit

Low power and low timing jitter phase-lock loop and method

OSCILLATOR, PLL OSCILLATOR, RADIO APPARATUS

Serial transceiver and communication method used by the serial transceiver

Ultra-wideband (UWB) frequency synthesizer system and method

Substantially zero temperature coefficient bias generator

Dividerless PLL architecture

Delay cell of voltage controlled delay line using digital and analog control scheme

RF transmitter with stable on-chip PLL

Multiphase DLL using 3-edge phase detector for wide-range operation

FREQUENCY DIVIDER AND PHASE LOCKED LOOP USING THE SAME

Controlling phase locked loop

VOLTAGE CONTROLLED OSCILLATOR AND PHASE LOCKED LOOP CIRCUIT INCORPORATING THE SAME

Phase lock loop semiconductor device

Delay locked loop circuit

Circuits for forming the inputs of a latch

Ultra-wideband variable-phase ring-oscillator arrays, architectures, and related methods

Filter-based lock-in circuits for PLL and fast system startup

Low lock time delay locked loops using time cycle suppressor

Clock multiplier and clock generator having the same

Phase locked loop and method for operating the same

Wireless communication semiconductor integrated circuit device and mobile communication system

Edge alignment for frequency synthesizers

Means to reduce the PLL phase bump caused by a missing clock pulse

Means to detect a missing pulse and reduce the associated PLL phase bump

Frequency synthesizer with a harmonic locked phase/frequency detector

Method for noise reduction in a phase locked loop and a device having noise reduction capabilities

Phase frequency detector with limited output pulse width and method thereof

Periodic signal synchronization apparatus, systems, and methods

Circuit and method for controlling mixed mode controlled oscillator and CDR circuit using the same

Timing vernier using a delay locked loop

Multiple reference frequency fractional-N PLL (phase locked loop)

Phase shifting in DLL/PLL

FREQUENCY SYNTHESIZER AND WIRELESS COMMUNICATION DEVICE UTILIZING THE SAME

SIGNAL GENERATING APPARATUS

Phase frequency detector and phase-locked loop

Low jitter phase rotator

Phase error cancellation

Device and method for phase synchronization with the aid of a microcontroller

Simplified bias circuitry for differential buffer stage with symmetric loads

Frequency synthesizer and charge pump circuit used therein

PLLS covering wide operating frequency ranges

Loop filter and phase-locked loop

Differential amplitude controlled sawtooth generator

System and method for effectively performing a clock signal distribution procedure

System and method for implementing a dual-mode PLL to support a data transmission procedure

Frequency synthesizer for integrated circuit radios

Design structure for improved current controlled oscillation device and method having wide frequency range

Adaptive Frequency Calibration Device of Frequency Synthesizer

TEMPERATURE COMPENSATED LOOP FILTER

Apparatus and method for controlling a delay- or phase-locked loop as a function of loop frequency

APPARATUS AND METHODS FOR CONTROLLING DELAY USING A DELAY UNIT AND A PHASE LOCKED LOOP

System and method of detecting a phase, a frequency and an arrival-time difference between signals

Integrated clock generator and timing/frequency reference

Oscillator circuit, PLL circuit, semiconductor chip, and test apparatus

Semiconductor device

Method and system for use of TSPC logic for high-speed multi-modulus divider in PLL

Low phase noise phase locked loops with minimum lock time

Method and system for fast PLL close-loop settling after open-loop VCO calibration

Phase locked loop with adaptive phase error compensation

Phase locked loop with small size and improved performance

Linear phase frequency detector and charge pump for phase-locked loop

Method and apparatus for generating a sequence of clock signals

Variable frequency oscillator and communication circuit with it

Low power and duty cycle error free matched current phase locked loop

JITTER SMOOTHING FILTER

Low power, low phase jitter, and duty cycle error insensitive clock receiver architecture and circuits for source synchronous digital data communication

Method and Apparatus for Distributing Charge Pump Current and Voltage for PLL Circuits

Delay-locked loop circuit and method of generating multiplied clock therefrom

Method and Apparatus for Distributing Charge Pump Current and Voltage for PLL Circuits

Device for static phase error compensation in a phase-lock loop system with a symmetrical structure

Regulated supply phase locked loop

Phase modulation method for spread spectrum clock generator

Wide frequency range delay locked loop

Method And System For A Local Oscillator (LO) Generator Architecture For Multi-Band Wireless Systems

Apparatus and method to reduce jitter in a phase locked loop

Circuit comprising a capacitive circuit component

Phase locked loop

Current controlled oscillation device and method having wide frequency range

Clock and data recovery circuit and method of recovering clocks and data

Phase-locked loop (PLL) circuit and method

Skew Correction Apparatus

Linear phase detector and clock/data recovery circuit thereof

Thermometer code generator, and frequency-locked loop including the same

Crystal oscillator emulator

High speed level shifter circuit and circuit using same

False lock protection in a delay-locked loop (DLL)

Clock multiplier and method of multiplying a clock

Phase-locked loop runaway detector

Delay adjusting circuit and control method of the same

Clock data recovery circuitry associated with programmable logic device circuitry

Delay locked loop circuit and method

Low noise phase locked loop with a high precision lock detector

Delay locked loop circuits and methods of generating clock signals

Methods and systems to provide a plurality of signals having respective different phases

PLL device with leakage current compensation unit

Phase locked loop, phase locked loop method and semiconductor device having phase locked loop

System and method for pre-charged linear phase-frequency detector

WIDE TUNING RANGE AND LOW JITTER VOLTAGE CONTROLLED OSCILLATOR

Lock Detecting Circuit, Lock Detecting Method

Communication semiconductor integrated circuit device and wireless communication system

Low power and low timing jitter phase-lock loop and method

Phase-frequency detector capable of reducing dead zone

Embedded structure circuit for VCO and regulator

System and method for design entry and synthesis in programmable logic devices

Frequency comparator

Overshoot reduction in VCO calibration for serial link phase lock loop (PLL)

PLL CIRCUIT, METHOD FOR PREVENTING INTERFERENCE BETWEEN PLL CIRCUITS, AND OPTICAL DISK APPARATUS COMPRISING THE PLL CIRCUIT

PHASE OFFSET CONTROL PHASE-FREQUENCY DETECTOR

Noise immunity circuitry for phase locked loops and delay locked loops

Phase-locked loop filter capacitance with a drag current

Phase-locked loop apparatus having aligning unit and method using the same

Phase frequency detector with limited output pulse width and method thereof

Phase lock loop circuit with delaying phase frequency comparson output signals

Current controlled oscillation device and method having wide frequency range

Charge pump circuit and method thereof

Low power and low timing jitter phase-lock loop and method

Fast locking mechanism for delay lock loops and phase lock loops

Delay locked loop circuit and semiconductor integrated circuit device

Switched capacitor filter and feedback system

System and method for mitigating phase pulling in a multiple frequency source system

Sampling clock generator circuit and data receiver using the same

Loop filtering for fast PLL locking

Frequency modulator using PLL

Crystal oscillator emulator

Semiconductor device

Retiming circuits for phase-locked loops

Multiple frequency source system and method of operation

Crystal oscillator emulator

Parallel controlled connections of the plurality of ring oscillator units, PLL, radio apparatus

Clock distribution system and method thereof

Crystal oscillator emulator

Offset signal phasing for a multiple frequency source system

Phase locked loop and method thereof

Low power and low timing jitter phase-lock loop and method

Phase-locked loop with adaptive bandwidth

Phase lock loop for rapid lock-in and method therefor

System and method for tuning a frequency synthesizer

Delay circuit with timing adjustment function

PLL apparatus with power saving mode and method for implementing the same

Phase locked loop for controlling a recording device and method thereof

PLL frequency synthesizer

LOCKED LOOP CIRCUIT FOR IMPROVING LOCKING SPEED AND CLOCK LOCKING METHOD USING THE SAME

Phase detector for data communications

Frequency synthesizer, wireless communications device, and control method

Counter capable of holding and outputting a count value and phase locked loop having the counter

Delay locked loop circuit and signal delay locking method

AC technique for eliminating phase ambiguity in clocking signals

Switch-capacitor loop filter for phase lock loops

Fractional-N frequency synthesizer

PLL with programmable jitter for loopback serdes testing and the like

Phase locked loop including a frequency change module

Delay locked loop circuit and method

Phase- or frequency-locked loop circuit having a glitch detector for detecting triggering-edge-type glitches in a noisy signal

Method and apparatus for fast locking of a clock generating circuit

Controlling phase locked loop in a mobile station

Phase-locked loop

Phase-interpolator based PLL frequency synthesizer

Phase-Locked Loop Integrated Circuits Having Fast Phase Locking Characteristics

Test apparatus, clock generator and electronic device

Timing circuits with improved power supply jitter isolation technical background

Capacitance multiplier circuit for PLL filter

Clock generation circuit and method of generating clock signals

Duty cycle correction circuit, clock generation circuits, semiconductor devices using the same, and method for generating clock signal

Wireless communication system

DLL circuit having two input standard clocks, clock signal generation circuit having the DLL circuit and clock signal generation method

Generating multiple delayed signals of different phases from a reference signal using delay locked loop (DLL)

Tri-stating a phase locked loop to conserve power

Apparatus and method for recovering clock and data

Voltage controlled oscillator, PLL circuit, pulse modulation signal generating circuit, semiconductor laser modulation device and image forming apparatus

Calibration circuit and operation method for voltage-controlled oscillator

Structure and method for providing gate leakage isolation locally within analog circuits

Frequency synthesizer with improved spurious performance

Semiconductor integrated circuit having a switch circuit that outputs reference clock until PLL locks

Delay cell of voltage controlled delay line using digital and analog control scheme

Circuits and methods for acquiring a frequency of a data bitstream

Timing vernier using a delay locked loop

Low jitter clock recovery circuit

Voltage-controlled oscillator for low-voltage, wide frequency range operation

Method and device for generating an output signal having a predetermined phase shift with respect to an input signal

False lock detection mechanism for use in a delay locked loop circuit

Method and apparatus for assisting pull-in of a phase-locked loop

In-loop duty corrector delay-locked loop for multiphase clock generation

PLL with controlled VCO bias

Semiconductor device, spread spectrum clock generator and method thereof

Clock recovery circuit

Circuit arrangement for detection of a locking condition for a phase locked loop, and a method

Apparatus and method for clock data recovery with low lock frequency

Fully integrated frequency generator

DLL-based programmable clock generator using a threshold-trigger delay element circuit and a circular edge combiner

High frequency synthesizer circuits and methods

Fast switching, dual frequency phase locked loop

Clock transferring apparatus, and testing apparatus

Delay-locked loop circuit

Phase detector

Establishing a tuning signal window for use in centering a multi-band voltage controlled oscillator

Method and apparatus for stabilizing output frequency of PLL (phase lock loop) and phase lock loop thereof

Delay-locked loop circuit with variable bias voltages and method of clock synchronization for a semiconductor memory device

Voltage-controlled oscillator with multi-phase realignment of asymmetric stages

Communication semiconductor integrated circuit device and wireless communication system

Clock data recovery loop with separate proportional path

Phase locked loop circuit and method of locking a phase

Testing circuit for measuring a frequency of signal output from clock generator

Wireless communication semiconductor integrated circuit device and mobile communication system

Frequency synthesizer with loop filter calibration for bandwidth control

Methods and systems to provide a plurality of signals having respective different phases

System and method for phase-locked loop leak compensation

System and method for PLL control

Integrated circuit package with air gap

Integrated circuit package with air gap

Data edge-to-clock edge phase detector for high speed circuits

Phase locked loop with temperature compensation

Clock generation circuit

Integrated circuit package with glass layer and oscillator

Phase and frequency detection circuits for data communication systems

Apparatus and method for controlling a delay- or phase-locked loop as a function of loop frequency

Integrated circuit with low dielectric loss packaging material

Jitter generation circuit and semiconductor device

Adjustable lock-in circuit for phase-locked loops

Switched capacitor filter and feedback system

Phase locked loop with power distribution

Phase locked system for generating distributed clocks

Phase-locked loop and method thereof and a phase-frequency detector and method thereof

RF transceiver incorporating dual-use PLL frequency synthesizer

Phase frequency detector with programmable delay

Method and apparatus for biasing a metal-oxide-semiconductor capacitor for capacitive tuning

Multi-phase realigned voltage-controlled oscillator and phase-locked loop incorporating the same

Feedback control circuit

Anti-gate leakage programmable capacitor

PLL circuit configured to distribute its loop control signal to CDR circuits

Oscillator including phase frequency detectors for detecting a phase difference between two input signals and outputting a control command signal

Radio transceiver having a phase-locked loop circuit

Delay locked loop circuit

Method and apparatus for initializing a delay locked loop

Low power and low timing jitter phase-lock loop and method

Method and circuit for frequency synthesis using a low drift current controlled oscillator with wide output frequency range

Controlled delay line circuit with integrated transmission line reference

PLL frequency synthesizer architecture for low phase noise and reference spurs

Circuits and methods of generating and controlling signals on an integrated circuit

Semiconductor integrated circuit with a cache circuit configured to determine an optimal portion to stop the operation between a sense amplifier and an output circuit based on the system clock

Method and system for operating a feedback system for a voltage controlled oscillator that involves correcting for offset related to the feedback system

Smart lock-in circuit for phase-locked loops

Dual loop PLL, and multiplication clock generator using dual loop PLL

Phase-lock loop and loop filter thereof

Programmable phase-locked loop circuitry for programmable logic device

Method and device for generating a signal by fractional frequency locked loop

Integrated clock generator and timing/frequency reference

Variable lock-in circuit for phase-locked loops

High-speed VCO calibration technique for frequency synthesizers

System and method for high frequency, high output swing buffers

Method and apparatus to reduce the jitter in wideband PLL frequency synthesizers using noise attenuation

PLL-based frequency synthesizer

Controlling a voltage controlled oscillator in a bang-bang phase locked loop

Phase locked loop having enhanced locking characteristics

Z-state circuit for phase-locked loops

Loop filter with gear shift for improved fractional-N PLL settling time

Programmable fractional N phase locked loop architecture and method

Controllable idle time current mirror circuit for switching regulators, phase-locked loops, and delay-locked loops

Reset-free delay-locked loop

System and method for synthesizing a clock at digital wrapper (FEC) and base frequencies using one precision resonator

Phase lock loop device

PLL circuit having reduced pull-in time

PLL circuit

Phase locked loop including an integrator-free loop filter

PLL circuit with deadlock detection circuit

Measuring the 3 dB frequency bandwidth of a phase-locked loop

Clock and data recovery apparatus

Phase lock loop and the control method thereof

Low lock time delay locked loops using time cycle suppressor

Spread spectrum clock generator and method for generating a spread spectrum clock signal

Delay locked loop having internal test path

Magneto-resistive RAM having multi-bit cell array structure

Multi-loop circuit capable of providing a delayed clock in phase locked loops

Duty cycle correction circuit and a method for duty cycle correction in a delay locked loop using an inversion locking scheme

Delay stage-interweaved analog DLL/PLL

Delay stage-interweaved analog DLL/PLL

Delay stage-interweaved analog DLL/PLL

Phase difference detecting apparatus

Clock generator and data recovery circuit using the same

Low power high frequency phase detector

Enhanced phase and frequency detector that improves performance in the presence of a failing clock

Phase-locked loop

High performance analog charge pumped phase locked loop (PLL) architecture with process and temperature compensation in closed loop bandwidth

Process tracking limiter for VCO control voltages

Variable frequency synthesizer comprising a sigma-delta modulator

Phase frequency detector

Optical driver including a multiphase clock generator having a delay locked loop (DLL), optimized for gigahertz frequencies

False-lock-free delay locked loop circuit and method

Phase-locked loop circuit

Phase lock loop with continuous calibration and method therefor

Linearized fractional-N synthesizer having a gated offset

PLL with balanced quadricorrelator

Phase-locked loop having dynamically adjustable up/down pulse widths

Phase-locked loop circuit

Delay stage-interweaved analog DLL/PLL

Reset signal generators for a frequency-phase detector and methods of generating reset signals for the same

Circuits and methods for detecting phase lock