222179 ⎘
Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop; Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector generating up-down pulses the up-down pulses controlling source and sink current generators, e.g. a charge pump
Sub-classes:HYBRID FRACTIONAL PHASE-LOCKED LOOP
#2PHASE-LOCKED LOOP WORKING SYSTEM
#3DUTY CYCLE CALIBRATION CIRCUIT, DUTY CYCLE CALIBRATION METHOD, AND CLOCK MULTIPLIER CIRCUIT
#4DELAY LOCKED LOOP (DLL) CIRCUIT WITH DUTY CYCLE CORRECTION
#5FRACTIONAL FREQUENCY-DIVIDER CIRCUIT
#6Oscillation Circuit, Oscillation Control Method, Phase-Locked Loop Circuit, and Electronic Device
#7Partial-Fractional Phase-locked Loop with Sigma Delta Modulator and Finite Impulse Response Filter
#8PHASE-LOCKED LOOP WITH IMPROVED PROCESS, FREQUENCY, AND TEMPERATURE INDEPENDENCE
#9CASCADED DUAL-LOOP PHASE-LOCKED LOOP (PLL) FOR LOWERED PHASE NOISE WITH IMPROVED TUNING RANGE
#10SIGNAL CONVERSION SYSTEM TO REDUCE ASYNCHRONOUS NOISE
#11PLL WITH A CONTROLLED RANGE OF OUTPUT FREQUENCY FOR MEMS GYROSCOPE
#12SIGNAL OSCILLATION CIRCUIT WITH ADAPTIVE TUNING FOR TAIL FILTERS
#13PHASE LOCK LOOP FILTER WITH COMMON MODE NOISE REJECTION
#14DIE-TO-DIE CLOCK SIGNALLING INCLUDING ADAPTIVE FREQUENCY DELAY-LOCKED LOOP
#15DELAY LOCKED LOOP CIRCUIT
#16SEMICONDUCTOR DEVICE, METHOD FOR CONTROLLING THE SEMICONDUCTOR DEVICE, AND CONTROL PROGRAM
#17PHASE-LOCKED LOOP UPDATE CANCELLATION
#18INITIAL CONTROL VOLTAGE GENERATING CIRCUIT FOR VOLTAGE-CONTROLLED OSCILLATOR AND PHASE-LOCKED LOOP CIRCUIT WITH THE INITIAL CONTROL VOLTAGE GENERATING CIRCUIT
#19DLL CIRCUIT AND LIGHT-EMITTING DEVICE
#20ELECTRONIC OSCILLATOR CIRCUIT AND A METHOD FOR CONTROLLING AN OSCILLATION FREQUENCY OF A RING OSCILLATOR CIRCUIT
#21VOLTAGE-CONTROLLED OSCILLATOR AND PHASE-LOCKED LOOP
#22Frequency-regulated oscillator circuit
#23LOOP FILTER USED IN PLL, AND PLL
#24PHASE LOCKED LOOP CIRCUIT AND METHOD OF OPERATION THEREOF
#25Wideband Voltage-Controlled Oscillator Circuitry
#26CIRCUIT WITH A PHASE LOCKED LOOP WITH DISTURBANCE RESPONSES
#27Phase-locked loop circuit with frequency holding and reference frequency smooth switching
#28FAST-LOCKING PHASE-LOCKED LOOP, FREQUENCY DIVIDER, AND COMMUNICATION DEVICE
#29CONFIGURABLE VOLTAGE REGULATOR CIRCUIT AND TRANSMITTER CIRCUIT
#30Continuous calibration of an atomic clock to an external reference
#31Clock data recovery circuit
#32CIRCUIT ARRANGEMENT, TIME-MODE ARITHMETIC UNIT, ALL-DIGITAL PHASE-LOCKED LOOP, AND CORRESPONDING METHODS
#33PHASE-LOCKED LOOP CIRCUIT AND SIGNAL PROCESSING DEVICE
#34Method and apparatus for reducing jitter in a phase-locked loop
#35PHASE LOCKED LOOP CIRCUIT
#36SEMICONDUCTOR INTEGRATED CIRCUIT, ELECTRONIC DEVICE, AND CONTROL METHOD FOR SEMICONDUCTOR INTEGRATED CIRCUIT
#37Clock generation circuit and voltage generation circuit including the clock generation circuit
#38Frequency-locked and phase-locked loop-based clock glitch detection for security
#39Method and circuit for DLL locking mechanism for wide range harmonic detection and false lock detection
#40CHARGE PUMP FILTERING CIRCUIT, PHASE-LOCKED LOOP CIRCUIT, AND CLOCK DATA RECOVERY CIRCUIT
#41Bandwidth Control in PLL-Based Power Converter
#42FOLDED RAMP GENERATOR
#43LOW JITTER PLL
#44Wideband voltage-controlled oscillator circuitry
#45Configurable voltage regulator circuit and transmitter circuit
#46Method and system for low noise sub-sampling phase lock loop (PLL) architecture with automatic dynamic frequency acquisition
#47Semiconductor integrated circuit, phase locked loop (PLL) circuit, and system
#48PHASE LOCKED LOOP USING ADAPTIVE FILTER TUNING FOR RADIATION HARDENING
#49Partial-Fractional Phase-locked Loop with Sigma Delta Modulator and Finite Impulse Response Filter
#50Partial-fractional phase-locked loop with sigma delta modulator and finite impulse response filter
#51Frequency-locked and phase-locked loop-based clock glitch detection for security
#52Current-mismatch compensated charge pump for phase-locked loop applications
#53Semiconductor integrated circuit, transmission circuit, and calibration method
#54Power converter device including a programmable clock signal circuit for a PLL in a constant on-time power converter
#55CLOCK AND DATA RECOVERY CIRCUIT AND A DISPLAY APPARATUS HAVING THE SAME
#56Time-of-flight sensing device and method thereof
#57Transceiver circuit and control method of frequency synthesizer
#58Fractional phase locked loop (PLL) with digital control driven by clock with higher frequency than PLL feedback signal
#59Clock data recovery circuit and display device including the same
#60Multi-core oscillator with enhanced mode robustness
#61Multi-core oscillator with enhanced mode robustness
#62PHASE LOCK LOOP WITH AN ADAPTIVE LOOP FILTER
#63Hybrid Analog/Digital Phase Locked Loop with Fast Frequency Changes
#64Phase-locked loop circuit and method for controlling the same
#65Clock and data recovery lock detection circuit for verifying lock condition in presence of imbalanced early to late vote ratios
#66Phase-locked loop slip detector
#67Initialization circuit of delay locked loop
#68Phase-locked loop circuit
#69Wideband voltage-controlled oscillator circuitry
#70Phase locked loop circuitry
#71PAM-4 receiver with jitter compensation clock and data recovery
#72Phase locked loop and operating method of phase locked loop
#73High performance phase locked loop for millimeter wave applications
#74Phase locked loop generating adaptive driving voltage and related operating method
#75Frequency dividing circuit, frequency dividing method and phase locked loop
#76Clock and data recovery lock detection circuit for verifying lock condition in presence of imbalanced early to late vote ratios
#77Fast lock phase-locked loop circuit for avoiding cycle slip
#78Folded ramp generator
#79PLL circuit, semiconductor apparatus, equipment
#80Inverter-based delay element with adjustable current source/sink to reduce delay sensitivity to process and supply voltage variation
#81Frequency detector for clock data recovery
#82Phase-locked loop circuit and digital operation system
#83Clock generation circuit and voltage generation circuit including the clock generation circuit
#84Low latency combined clock data recovery logic network and charge pump circuit
#85High performance phase locked loop for millimeter wave applications
#86Phase locking circuit
#87Multi-modal data-driven clock recovery circuit
#88Automatic frequency calibration and lock detection circuit and phase locked loop including te same
#89Data-driven phase detector element for phase locked loops
#90Frequency modulation system based on phase-locked loop capable of performing fast modulation independent of bandwidth and method of the same
#91Method and apparatus for precision phase skew generation
#92Phase lock loop circuit based signal generation in an optical measurement system
#93Clock recovery circuit, clock data recovery circuit, and apparatus including the same
#94Storage devices and methods of operating storage devices
#95Fast bandwidth spectrum analysis
#96Zero-delay phase-locked loop frequency synthesizer based on multi-stage synchronization
#97Apparatus and methods for improved transmit power
#98System and method for low jitter phase-lock loop based frequency synthesizer
#99Clock and data recovery circuit and a display apparatus having the same
#100Process for managing the start-up of a phase-locked loop, and corresponding integrated circuit
#101Phase-locked loop slip detector
#102Charge pump
#103Clock and data recovery circuit and frequency maintaining method
#104Matrix phase interpolator for phase locked loop
#105Clock and data recovery circuit with proportional path and integral path, and multiplexer circuit for clock and data recovery circuit
#106Signal conversion circuit utilizing switched capacitors
#107Configurable voltage regulator circuit and transmitter circuit
#108Distance-measuring imaging device
#109Phase lock loop circuit based signal generation in an optical measurement system
#110Clock and data recovery device and clock and data recovery method
#111Voltage-controlled oscillator and PLL circuit in which same is used
#112Method of calibrating clock phase and voltage offset, data recovery circuit performing the same and receiver including the same
#113Charge pump with load driven clock frequency management
#114Fast bandwidth spectrum analysis
#115Transmitter with reduced VCO pulling
#116Clock and data recovery circuitry with asymmetrical charge pump
#117Charge pump
#118Clock recovery circuit, clock data recovery circuit, and apparatus including the same
#119Folded ramp generator
#120Method and circuits for fine-controlled phase/frequency offsets in phase-locked loops
#121CLOCK DATA RECOVERY CIRCUIT WITH IMPROVED PHASE INTERPOLATION
#122Clock data recovery circuit and display device including the same
#123Phase-locked loop (PLL) calibration
#124Semiconductor integrated circuit, receiver device, and method for controlling semiconductor integrated circuit
#125Method and apparatus for precision phase skew generation
#126Imaging system and endoscope system
#127Bayesian neural network and methods and apparatus to operate the same
#128METHOD, COMPUTER READABLE MEDIUM AND SYSTEM FOR SEMI-AUTOMATED DESIGN OF INTEGRATED CIRCUIT
#129Phase locked loop
#130Phase-locked loop (PLL) circuit and clock generator including sub-sampling circuit
#131Method for managing the startup of a phase-locked loop and corresponding integrated circuit
#132Time-of-light sensing device and method thereof
#133Image synchronization without input clock and data transmission clock in a pulsed fluorescence imaging system
#134Image synchronization without input clock and data transmission clock in a pulsed hyperspectral imaging system
#135Phase-locked loop slip detector
#136HIGH-SPEED LINEAR CHARGE PUMP CIRCUITS FOR CLOCK DATA RECOVERY
#137Image synchronization without input clock and data transmission clock in a pulsed fluorescence imaging system
#138Image synchronization without input clock and data transmission clock in a pulsed fluorescence imaging system
#139IMAGE SYNCHRONIZATION WITHOUT INPUT CLOCK AND DATA TRANSMISSION CLOCK IN A PULSED LASER MAPPING IMAGING SYSTEM
#140Phase locked loop (PLL) circuit with voltage controlled oscillator (VCO) having reduced gain
#141Phase difference detectors and devices for detecting phase difference between oscillation signals
#142Method of calibrating clock phase and voltage offset, data recovery circuit performing the same and receiver including the same
#143Charge pump with load driven clock frequency management
#144Non-contact self-injection-locked vital sign sensor
#145Divider control and reset for phase-locked loops
#146System and method for fast-converging digital-to-time converter (DTC) gain calibration for DTC-based analog fractional-N phase lock loop (PLL)
#147Phase-locked loop circuitry having low variation transconductance design
#148Filterless digital phase-locked loop
#149PHASE-FREQUENCY DETECTOR
#150Multi-modal data-driven clock recovery circuit
#151Methods and apparatus to improve power converter on-time generation
#152Charge pump with load driven clock frequency management
#153Pullable clock oscillator
#154INTEGRATED VOLTAGE AND CLOCK REGULATION
#155Clock generator and image sensor including the same
#156PLL with wide frequency coverage
#157Loop filter for a phase-locked loop
#158Circuit device, oscillator, electronic apparatus and moving object
#159Device and method with clock frequency supply
#160PHASE LOCKED LOOP
#161VOLTAGE CONTROLLED OSCILLATOR BASED ON COMPLEMENTARY CURRENT-INJECTION FIELD-EFFECT TRANSISTOR DEVICES
#162Phase-locked loop with phase information multiplication
#163Phase locked loop
#164Filterless digital phase-locked loop
#165Phase locked loop frequency shift keying demodulator using an auxiliary charge pump and a differential slicer
#166Method and apparatus for precision phase skew generation
#167Method and apparatus for calibration of a band-pass filter and squelch detector in a frequency-shift keying transceiver
#168Multi-rate DEM with mismatch noise cancellation for digitally-controlled oscillators
#169Non-integer frequency divider
#170Method and system for maintaining a low-jitter low-temperature-drift clock during a holdover operation
#171Clock generating circuit and hybrid circuit
#172System for phase calibration of phase locked loop
#173Matrix phase interpolator for phase locked loop
#174Serializer/deserializer physical layer circuit
#175Low latency combined clock data recovery logic network and charge pump circuit
#176Multi-chip timing alignment to a common reference signal
#177Wideband signal source
#178Phase locked loop, phase locked loop arrangement, transmitter and receiver and method for providing an oscillator signal
#179Method and circuits for phase-locked loops
#180Divider-less phase locked loop
#181Low voltage inverter-based amplifier
#182Oscillating circuit and method for calibrating a resonant frequency of an LC tank of an injection-locked oscillator (ILO) of the oscillating circuit while stopping self-oscillation of the ILO
#183Frequency-modulated continuous-wave radar system and frequency tracking method for calibrating frequency gains of a radio frequency signal to approach wideband flatness frequency responses
#184Programmable clock data recovery (CDR) system including multiple phase error control paths
#185Efficient differential charge pump with sense and common mode control
#186PLL circuit
#187Method for managing a phase-locked loop and related circuit
#188PLL circuit
#189Clock and data recovery circuit
#190Techniques for signal skew compensation
#191PLL circuit, semiconductor device including the same, and control method of PLL circuit
#192Data receiver circuit
#193SoC supply droop compensation
#194Phase rotation circuit for eye scope measurements
#195Frequency detector, and clock and data recovery circuit including the frequency detector
#196Frequency detector for clock recovery
#197Clock and data recovery circuit
#198Non-transitory machine readable medium for clock recovery
#199Apparatus and method for clock recovery based on non-non return to zero (non-NRZ) data signals
#200Apparatus and method for clock recovery
#201Method and circuits for charge pump devices of phase-locked loops
#202RING OSCILLATOR TOPOLOGY BASED ON RESISTOR ARRAY
#203DELAY LOCKED LOOP CIRCUIT
#204Clock and data recovery of sub-rate data
#205System and method for fast-converging digital-to-time converter (DTC) gain calibration for DTC-based analog fractional-N phase lock loop (PLL)
#206Method and circuits for fine-controlled phase/frequency offsets in phase-locked loops
#207Wireless receiving device, wake-up receiver and method for calibrating a frequency and a bandwidth
#208Oscillator, electronic apparatus, and vehicle
#209Power management circuit and display device having the same
#210TIMING CONTROLLER MODULATING A GATE CLOCK SIGNAL AND DISPLAY DEVICE INCLUDING THE SAME
#211Voltage-controlled oscillator and phase-locked loop
#212Phase locked loop, phase locked loop arrangement, transmitter and receiver and method for providing an oscillator signal
#213Transient event detector circuit and method
#214Calibration of a voltage controlled oscillator to trim the gain thereof, using a phase locked loop and a frequency locked loop
#215Phase-locked loop output adjustment
#216Jitter reduction in clock and data recovery circuits
#217Charge pump circuit and PLL circuit
#218Referenceless clock and data recovery circuits
#219Delay-locked loop (DLL) with differential delay lines
#220Two dimensional charge pump
#221Integrated circuit device, physical quantity measuring device, electronic apparatus, and vehicle
#222Phase locked loop (PLL)
#223Hybrid phase-locked loop
#224Wide capture range reference-less frequency detector
#225Radio signal processing device, semiconductor device, and oscillation frequency variation correction method
#226Digital phase locked loop
#227Quantization noise cancellation for fractional-N phased-locked loop
#228Four-phase oscillator and CDR circuit
#229Multi-modal data-driven clock recovery circuit
#230Frequency divider
#231Frequency generating circuit using quartz crystal resonator
#232Phase-locked loop with high bandwidth using rising edge and falling edge of signal
#233Fractional-N frequency synthesizer and method thereof
#234Track-and-hold charge pump and PLL
#235Protecting analog circuits with parameter biasing obfuscation
#236Fully integrated complete multi-band RF frontend system integrated circuit (IC) chip
#237Apparatus and methods for phase synchronization of phase-locked loops
#238Method and device for doubling the frequency of a reference signal of a phase locked loop
#239Voltage-controlled oscillator and phase locked loop circuit with such voltage-controlled oscillator
#240Clock circuit jitter calibration
#241Method and circuits for phase-locked loops
#242Digital linearization technique for charge pump based fractional phased-locked loop
#243Quantization noise cancellation for fractional-N phased-locked loop
#244Output driver pulse overlap control
#245Apparatus and method for generating stable reference current
#246Clock and data recovery circuit with jitter tolerance enhancement
#247Differential PLL with charge pump chopping
#248Method and circuits for charge pump devices of phase-locked loops
#249Low-jitter phase-locked loop circuit
#250Radio Frequency Device and Corresponding Method
#251Wide capture range reference-less frequency detector
#252Phase-locked-loop architecture
#253Spread spectrum clock generator
#254Frequency-modulated continuous wave generator and frequency-modulated continuous wave radar system including the same
#255Clock recovery circuit, semiconductor integrated circuit device and radio frequency tag
#256SYSTEMS AND METHOD INVOLVING FAST-ACQUISITION LOCK FEATURES ASSOCIATED WITH PHASE LOCKED LOOP CIRCUITRY
#257High impedance passive switched capacitor common mode feedback network
#258Differential charge pump with extended output control voltage range
#259Reception circuit and semiconductor integrated circuit
#260Reference-frequency-insensitive phase locked loop
#261Transient event detector circuit and method
#262Pullable clock oscillator
#263Data-driven phase detector element for phase locked loops
#264Phase rotation circuit for eye scope measurements
#265Spread spectrum clock generator
#266SoC supply droop compensation
#267Fast-response hybrid lock detector
#268Phase locked loop circuit with charge pump up-down current mismatch adjustment and static phase error reduction
#269Frequency division correction circuit, reception circuit, and integrated circuit
#270MULTIPLE-OUTPUT OSCILLATOR CIRCUITS
#271Passive phased injection locked circuit
#272Method and apparatus for clock phase generation
#273Spread spectrum clocking phase error cancellation for analog CDR/PLL
#274Time to digital converter, radio communication device, and radio communication method
#275Phase frequency detector and accurate low jitter high frequency wide-band phase lock loop
#276Phase-locked loops with electrical overstress protection circuitry
#277Apparatus for low power signal generator and associated methods
#278System and method for voltage-controlled oscillator calibration
#279Semiconductor device
#280Apparatus and methods for phase synchronization of phase-locked loops
#281Frequency synthesizing device and automatic calibration method thereof
#282Time register
#283SIGNAL GENERATION CIRCUIT AND SIGNAL GENERATION METHOD
#284PLL system and method of operating same
#285Method and circuits for phase-locked loops
#286Clock signal and supply voltage variation tracking
#287Clock circuit and control method thereof
#288Wide frequency range delay locked loop
#289SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE AND WIRELESS COMMUNICATION APPARATUS
#290Phase error detection in phase lock loop and delay lock loop devices
#291Spread spectrum clock generator circuit
#292Digital fractional-N PLL based upon ring oscillator delta-sigma frequency conversion
#293Reference-less clock and data recovery circuit
#294Forwarded clock receiver based on delay-locked loop
#295Spread spectrum clock generator
#296Switched-capacitor loop filter
#297Signal generator using multi-sampling and edge combining and associated signal generating method
#298All-digital phase locked loop (ADPLL) including a digital-to-time converter (DTC) and a sampling time-to-digital converter (TDC)
#299Fractional PLL using a linear PFD with adjustable delay
#300SELF-BIASED OSCILLATOR