ClassID:

222201

H03L7/107 - CPC Classification

Classification description:

Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop; Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range using a variable transfer function for the loop, e.g. low pass filter having a variable bandwidth

Sub-classes:
Recent Application in this class:
#1
20260142665
2026-05-21

CASCADED MULTI-LOOP PHASE LOCKED LOOP (PLL) CLOCK SYNCHRONIZER TOLERANT TO FAILURE OF INTERMEDIATE LOOPS

#2
20260142663
2026-05-21

Digtal Phase-locked Loop with Digital Loop Filter Comprising Noise Cancellation Path, and Method of Operating Same

#3
20260031796
2026-01-29

CLOCK DUTY CYCLE CALIBRATION CIRCUIT, METHOD, AND CLOCK MULTIPLIER CIRCUIT

#4
20250392316
2025-12-25

METHODS AND APPARATUS OF CHARGE-SHARING LOCKING WITH DIGITAL CONTROLLED OSCILLATORS

#5
20250323651
2025-10-16

SEMICONDUCTOR DEVICE

#6
20250211241
2025-06-26

LINEAR PREDICTION TO SUPPRESS SPURS IN A DIGITAL PHASE-LOCKED LOOP

#7
20240291495
2024-08-29

Phase-locked loops (PLL), including time-to-digital converter (TDC) gain calibration circuits and related methods

#8
20240267052
2024-08-08

PHASE-LOCKED LOOPS (PLL) INCLUDING DIGITALLY CONTROLLED OSCILLATOR (DCO) GAIN CALIBRATION CIRCUITS AND RELATED METHODS

#9
20240223195
2024-07-04

Phase estimation for high frequency signals

#10
20240195420
2024-06-13

Delta-sigma modulator with modified quantization error shaping

#11
20240162906
2024-05-16

Apparatus and method for optimum loop gain calibration for clock data recovery and phase locked loop

#12
20240039520
2024-02-01

CLOCK SYNTHESIZER

#13
20240022255
2024-01-18

METHODS AND APPARATUS OF CHARGE-SHARING LOCKING WITH DIGITAL CONTROLLED OSCILLATORS

#14
20240022254
2024-01-18

DOUBLY-BALANCED AUTO-ZERO LFPS AND SQUELCH DETECTION

#15
20230353158
2023-11-02

Methods and systems for controlling frequency and phase variations for PLL reference clocks

#16
20230350451
2023-11-02

Methods and systems for controlling frequency variation for a PLL reference clock

#17
20230344434
2023-10-26

Automatic Hybrid Oscillator Gain Adjustor Circuit

#18
20230198532
2023-06-22

METHOD FOR CHANGING A BITWIDTH OF AN FPGA CONFIGURATION

#19
20230113143
2023-04-13

Low power quadrature phase detector

#20
20230094645
2023-03-30

Linear prediction to suppress spurs in a digital phase-locked loop

#21
20230052899
2023-02-16

Methods and apparatus of charge-sharing locking with digital controlled oscillators

#22
20230028270
2023-01-26

All-digital phase-locked loop and calibration method thereof

#23
20230012436
2023-01-12

Automatic Hybrid Oscillator Gain Adjustor Circuit

#24
20210273644
2021-09-02

Apparatus and methods for digital fractional phase locked loop with a current mode low pass filter

#25
20210273642
2021-09-02

Clock and data recovery circuit, memory storage device and signal generating method

#26
20210203334
2021-07-01

Connection interface circuit, memory storage device and phase-locked loop circuit calibration method

#27
20210143803
2021-05-13

Apparatus and method for improving lock time

#28
20210021273
2021-01-21

Phase-locked loop (PLL) circuit and clock generator including sub-sampling circuit

#29
20200266823
2020-08-20

Feedback control for accurate signal generation

#30
20200127647
2020-04-23

Apparatus and method for improving lock time

#31
20200112465
2020-04-09

Phase locked loop frequency shift keying demodulator using an auxiliary charge pump and a differential slicer

#32
20200091918
2020-03-19

Frequency synthesis with accelerated locking

#33
20190305785
2019-10-03

Fast settling ramp generation using phase-locked loop

#34
20190296749
2019-09-26

PLL circuit

#35
20180115315
2018-04-26

Adaptive bandwidth systems and methods

#36
20180097522
2018-04-05

Fast settling sawtooth ramp generation in a phase-locked loop

#37
20180062893
2018-03-01

Coherent phase-synchronizing circuit

#38
20170214408
2017-07-27

Switched-capacitor loop filter

#39
20170207635
2017-07-20

Synchronization system for power generation unit and method thereof

#40
20170104475
2017-04-13

Oscillator

#41
20170085364
2017-03-23

Self-adapting phase-locked loop filter for use in a read channel of a heat assisted magnetic recording drive

#42
20170063386
2017-03-02

PLL circuit and operation method

#43
20160373122
2016-12-22

FREQUENCY SYNTHESIZER CIRCUIT

#44
20160315625
2016-10-27

Phase-rotating phase locked loop and method of controlling operation thereof

#45
20160301418
2016-10-13

Autoconfigurable Phase-Locked Loop Which Automatically Maintains a Constant Damping Factor and Adjusts the Loop Bandwidth to a Constant Ratio of the Reference Frequency

#46
20160199005
2016-07-14

Biological information measurement method and apparatus with variable loop filter

#47
20140333346
2014-11-13

Phase-rotating phase locked loop and method of controlling operation thereof

#48
20130287154
2013-10-31

Device and method for preventing lost synchronization

#49
20130093479
2013-04-18

Semiconductor device and radio communication terminal mounting the same

#50
20120319786
2012-12-20

Autoconfigurable phase-locked loop which automatically maintains a constant damping factor and adjusts the loop bandwidth to a constant ratio of the reference frequency

#51
20120286830
2012-11-15

Clock generation system

#52
20120139587
2012-06-07

Frequency synthesiser

#53
20120119801
2012-05-17

Phase-locked loop

#54
20120105116
2012-05-03

Frequency synthesizer

#55
20110234324
2011-09-29

System and method for reducing lock time in a phase-locked loop

#56
20110169501
2011-07-14

DELAY CIRCUIT

#57
20110140760
2011-06-16

Local oscillator with injection pulling suppression and spurious products filtering

#58
20100172060
2010-07-08

System and method for ESD protection

#59
20100134160
2010-06-03

Frequency synthesizer

#60
20100013532
2010-01-21

Phase-locked loop circuits and methods implementing multiplexer circuit for fine tuning control of digitally controlled oscillators

#61
20090207961
2009-08-20

Phase synchronization circuit and receiver having the same

#62
20090153253
2009-06-18

System and method for reducing lock time in a phase-locked loop

#63
20090140817
2009-06-04

Transistor voltage-controlled oscillator and frequency synthesizer having the same

#64
20090140816
2009-06-04

Synthesizer characterization in real time

#65
20090128241
2009-05-21

Analogue self-calibration method and apparatus for low noise, fast and wide-locking range phase locked loop

#66
20090111408
2009-04-30

Method and apparatus for providing a dual-loop phase lock loop

#67
20090002079
2009-01-01

CONTINUOUS GAIN COMPENSATION AND FAST BAND SELECTION IN A MULTI-STANDARD, MULTI-FREQUENCY SYNTHESIZER

#68
20090002038
2009-01-01

Phase Locked Loop with Stabilized Dynamic Response

#69
20080310570
2008-12-18

Device and method for preventing lost synchronization

#70
20080284525
2008-11-20

Noise canceling technique for frequency synthesizer

#71
20080187083
2008-08-07

Device for generating counter signals representative of clock signals and device for reconstructing clock signals, for a packet-switched network

#72
20080157865
2008-07-03

TUNABLE CAPACITANCE MULTIPLIER CIRCUIT

#73
20080129398
2008-06-05

High resolution digitally controlled oscillator

#74
20080007365
2008-01-10

Continuous gain compensation and fast band selection in a multi-standard, multi-frequency synthesizer

#75
20070281651
2007-12-06

Communication semiconductor integrated circuit device and wireless communication system

#76
20070200603
2007-08-30

Regulated adaptive-bandwidth PLL/DLL using self-biasing current from a VCO/VCDL

#77
20070194825
2007-08-23

Adaptive delay-locked loops and methods of generating clock signals using the same

#78
20070172014
2007-07-26

Digital PLL circuit and optical disk apparatus having digital PLL circuit

#79
20070164829
2007-07-19

Sigma-delta fractional-N PLL with reduced frequency error

#80
20070159262
2007-07-12

Current-mode gain-splitting dual-path VCO

#81
20070110206
2007-05-17

Low jitter and/or fast lock-in clock recovery circuit

#82
20070087716
2007-04-19

Wireless communication system

#83
20070081610
2007-04-12

Local oscillator with injection pulling suppression and spurious products filtering

#84
20070046388
2007-03-01

PLL circuit with self-selecting variable divide ratio

#85
20070040617
2007-02-22

Analogue self-calibration method and apparatus for low noise, fast and wide-locking range phase locked loop

#86
20070018735
2007-01-25

Phase locked loop circuit having reduced lock time

#87
20070010225
2007-01-11

Communication semiconductor integrated circuit device and wireless communication system

#88
20070001719
2007-01-04

Tunable high-speed frequency divider

#89
20060285618
2006-12-21

Adaptive phase recovery

#90
20060284746
2006-12-21

Digital expander for generating multiple analog control signals particularly useful for controlling an oscillator

#91
20060284687
2006-12-21

Phase-locked loop having a bandwidth related to its input frequency

#92
20060269032
2006-11-30

Circuit, control system, IC, transmitting and receiving apparatus, control method and program

#93
20060220757
2006-10-05

Semiconductor integrated circuit for communication

#94
20060214735
2006-09-28

Method to configure phase-locked loop dividing ratio

#95
20060209941
2006-09-21

Method for synchronizing exporter and exciter clocks

#96
20060176118
2006-08-10

Oscillator

#97
20060152289
2006-07-13

Variable lock-in circuit for phase-locked loops

#98
20060139076
2006-06-29

Z-state circuit for delay-locked loops

#99
20060119443
2006-06-08

Damping coefficient variation mechanism in a phase locked loop

#100
20060076993
2006-04-13

High speed clock and data recovery system

#101
20060038925
2006-02-23

Integrated circuit television receiver arrangement

#102
20050215221
2005-09-29

Local oscillator circuit

#103
20050151594
2005-07-14

Programmable bandwidth during start-up for phase-lock loop

#104
20050151593
2005-07-14

Programmable bandwidth and frequency slewing for phase-lock loop

#105
20050134491
2005-06-23

Digital expander apparatus and method for generating multiple analog control signals particularly useful for controlling an oscillator

#106
20050083145
2005-04-21

Adaptively extending tunable range of frequency in a closed loop

#107
20050068073
2005-03-31

Regulated adaptive-bandwidth PLL/DLL using self-biasing current from a VCO/VCDL

#108
20050046490
2005-03-03

Adaptive loop bandwidth circuit for a PLL

#109
18095855
2023-11-14

Frequency stabilized and phase noise suppressed microwave source using an IQ mixer to detect amplitude modulation and phase perturbation of the reflected signal

#110
17558131
2022-10-11

Low-pass filtering system having phase-locked loop

#111
17083968
2022-01-18

Bandwidth adjustability in an FMCW PLL system

#112
16804070
2020-11-24

Apparatus and methods for digital fractional phase locked loop with a current mode low pass filter