222233 ⎘
Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop; Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using more than one loop with pulse counters or frequency dividers Nested phase locked loops
CLOCK GENERATION APPARATUS, CLOCK GENERATION METHOD, ADJUSTMENT APPARATUS, ADJUSTMENT METHOD, AND NON-TRANSITORY COMPUTER READABLE MEDIUM
#2Delta-sigma modulator with modified quantization error shaping
#3CLOCK GENERATION APPARATUS, CLOCK GENERATION METHOD, ADJUSTMENT APPARATUS, ADJUSTMENT METHOD, AND NON-TRANSITORY COMPUTER READABLE MEDIUM
#4PHASE NOISE PERFORMANCE USING MULTIPLE RESONATORS WITH VARYING QUALITY FACTORS AND FREQUENCIES
#5Method and apparatus for performing on-system phase-locked loop management in memory device
#6Generator and method for generating a controlled frequency
#7Method and apparatus for performing on-system phase-locked loop management in memory device
#8Frequency synthesizer
#9Apparatus and method to mitigate phase frequency modulation due to inductive coupling
#10FBAR-BASED LOCAL OSCILLATOR GENERATION
#11Wide range frequency synthesizer with quadrature generation and spur cancellation
#12Clock recovery circuits, systems and implementation for increased optical channel density
#13Phase-locked loop output adjustment
#14Apparatus and method to mitigate phase frequency modulation due to inductive coupling
#15Clock and data recovery having shared clock generator
#16Digital phase locked loop and operating method of digital phase locked loop
#17Apparatus and methods for phase synchronization of phase-locked loops
#18Fractional-N PLL with sleep modes
#19Clock synchronizer and method of establishing an output clock
#20Wide range frequency synthesizer with quadrature generation and spur cancellation
#21Apparatus and methods for phase synchronization of phase-locked loops
#22High order hybrid phase locked loop with digital scheme for jitter suppression
#23Apparatus and method to mitigate phase and frequency modulation due to inductive coupling
#24METHODS AND SYSTEMS FOR CASCADED PHASE-LOCKED LOOPS (PLLS)
#25Method of establishing an oscillator clock signal
#26Clock synchronizer
#27Dual-loop programmable and dividerless clock generator for ultra low power applications
#28Display apparatus and driving method for the same
#29Reference frequency calibration module and apparatus using the same
#30RF circuit
#31Wide range frequency synthesizer with quadrature generation and spur cancellation
#32Self-calibrating shared-component dual synthesizer
#33Clock and data recovery having shared clock generator
#34Direct digital synthesizer, reference frequency generating device, and sine wave outputting method
#35Phase locked loop circuit
#36Cascaded PLL for reducing low-frequency drift in holdover mode
#37Method and apparatus for single port modulation using a fractional-N modulator
#38Filtering circuit, phase identity determination circuit and delay locked loop
#39Method of establishing an oscillator clock signal
#40Use of Frequency addition in a PLL control loop
#41Clock generating circuit
#42Wide range frequency synthesizer with quadrature generation and spur cancellation
#43Filtering circuit, phase identity determination circuit and delay locked loop
#44Circuits and methods for a combined phase detector
#45Differentiator based spread spectrum modulator
#46Phase averaging-based clock and data recovery
#47SIGNAL GENERATING APPARATUS AND METHOD OF GENERATING SIGNAL
#48Circuit arrangement for generation of radio frequency output signals which form a broadband frequency ramp
#49Method and apparatus for efficient time slicing
#50Phase locked loop, CDR circuit, and receiving circuit
#51Signal processing apparatus
#52Fractional-N phase-locked loop
#53Method of establishing an oscillator clock signal
#54Film-thickness measuring device using PLL circuit
#55Digital controller for automatic rate detection and tracking of audio interface clocks
#56Continuous-rate clock recovery circuit
#57Digital phase-locked loop clock system
#58Frequency synthesis using upconversion PLL processes
#59Digitally compensated highly stable holdover clock generation techniques using adaptive filtering
#60SPREAD SPECTRUM CLOCK GENERATOR CAPABLE OF FREQUENCY MODULATION WITH HIGH ACCURACY
#61Method of establishing an oscillator clock signal
#62Dual loop architecture useful for a programmable clock source and clock multiplier applications
#63Controlling phase locked loop
#64Audio clock regenerator with precisely tracking mechanism
#65HORIZONTAL SYNCHRONOUS CIRCUIT, DISPLAY DEVICE, AND CLOCK ADJUSTING METHOD
#66CALIBRATION OF OSCILLATOR DEVICES
#67Semiconductor integrated circuit with clock generator
#68Circuit, control system, IC, transmitting and receiving apparatus, control method and program
#69Method of establishing an oscillator clock signal
#70Voltage controlled clock synthesizer
#71Portable radio terminal and AFC control method
#72Portable radio terminal and AFC control method
#73Semiconductor integrated circuit with clock generator
#74Reconfigurable terminal
#75Phase synchronization circuit
#76Apparatuses and methods involving phase-error tracking circuits
#77Low noise frequency source