ClassID:

240274

Y10S257/907 - CPC Classification

Classification description:

Active solid-state devices, e.g. transistors, solid-state diodes Folded bit line dram configuration

Recent Application in this class:
#1
20150333151
2015-11-19

Method of forming semiconductor device including protrusion type isolation layer

#2
20120119290
2012-05-17

SEMICONDUCTOR DEVICE INCLUDING PROTRUSION TYPE ISOLATION LAYER

#3
20100258860
2010-10-14

Semiconductor device including protrusion type isolation layer

#4
20100230742
2010-09-16

Non-volatile semiconductor memory device

#5
20100015767
2010-01-21

Cell region layout of semiconductor device and method of forming contact pad using the same

#6
20090261422
2009-10-22

Cell structure of semiconductor device having an active region with a concave portion

#7
20090020808
2009-01-22

Semiconductor integrated circuit devices having contacts formed of single-crystal materials

#8
20080304311
2008-12-11

Integrated circuit including logic portion and memory portion

#9
20080209303
2008-08-28

Error Detection/Correction Method

#10
20080165577
2008-07-10

Semiconductor device

#11
20080152934
2008-06-26

Memory device with active layer of dendrimeric material

#12
20080073719
2008-03-27

Semiconductor device

#13
20080068882
2008-03-20

Semiconductor device

#14
20080055974
2008-03-06

Semiconductor device

#15
20080026571
2008-01-31

Bit line barrier metal layer for semiconductor device and process for preparing the same

#16
20070285960
2007-12-13

Single-mask phase change memory element

#17
20070241395
2007-10-18

High density memory array having increased channel widths

#18
20070059914
2007-03-15

Method of forming micro patterns in semiconductor devices

#19
20070004132
2007-01-04

Methods of forming memory circuitry

#20
20060226472
2006-10-12

Cell region layout of semiconductor device and method of forming contact pad using the same

#21
20060118954
2006-06-08

Bit line barrier metal layer for semiconductor device and process for preparing the same

#22
20060097301
2006-05-11

High density memory devices having improved channel widths and cell size

#23
20060082004
2006-04-20

Semiconductor substrate having first and second pairs of word lines

#24
20060081921
2006-04-20

Integrated circuit device having non-linear active area pillars

#25
20060076616
2006-04-13

High density memory array having increased channel widths

#26
20060054951
2006-03-16

Memory cell arrays

#27
20060043472
2006-03-02

High density access transistor having increased channel width and methods of fabricating such devices

#28
20050280028
2005-12-22

Semiconductor device

#29
20050255644
2005-11-17

Semiconductor device having both memory and logic circuit and its manufacture

#30
20050221539
2005-10-06

Semiconductor device capable of preventing moisture-absorption of fuse area thereof and method for manufacturing the fuse area

#31
20050213379
2005-09-29

Semiconductor device

#32
20050207215
2005-09-22

Methods of forming memory circuitry

#33
20050205914
2005-09-22

Semiconductor device and method of manufacturing the same

#34
20050135137
2005-06-23

Semiconductor memory devices having conductive line in twisted areas of twisted bit line pairs

#35
20050064656
2005-03-24

Selective polysilicon stud growth

#36
20050009270
2005-01-13

Methods of forming memory circuitry