ClassID:

240276

Y10S257/909 - CPC Classification

Classification description:

Active solid-state devices, e.g. transistors, solid-state diodes Macrocell arrays, e.g. gate arrays with variable size or configuration of cells

Recent Application in this class:
#1
20140328105
2014-11-06

Methods and apparatus for layout of three dimensional matrix array memory for reduced cost patterning

#2
20110241121
2011-10-06

Semiconductor devices including SRAM cell and methods for fabricating the same

#3
20110095438
2011-04-28

Methods and apparatus for layout of three dimensional matrix array memory for reduced cost patterning

#4
20110095434
2011-04-28

Apparatus and methods of forming memory lines and structures using double sidewall patterning for four times half pitch relief patterning

#5
20110095338
2011-04-28

Methods of forming pillars for memory cells using sequential sidewall patterning

#6
20090302378
2009-12-10

METHOD AND SYSTEM FOR VERTICAL DMOS WITH SLOTS

#7
20080237646
2008-10-02

Semiconductor integrated circuit device and method of producing the same

#8
20080206946
2008-08-28

Method of fabricating memory including diode

#9
20080105929
2008-05-08

Semiconductor integrated circuit

#10
20070096187
2007-05-03

Semiconductor device including source strapping line

#11
20070052046
2007-03-08

Pressure sensors and methods of making the same

#12
20060220116
2006-10-05

System for vertical DMOS with slots

#13
20060157801
2006-07-20

Nonvolatile semiconductor memory device and method for manufacturing the same

#14
20060151842
2006-07-13

Apparatus and method for reducing gate leakage in deep sub-micron MOS transistors using semi-rectifying contacts

#15
20060131609
2006-06-22

Semiconductor integrated circuit device formed by automatic layout wiring by use of standard cells and design method of fixing its well potential

#16
20060118958
2006-06-08

Line layout structure of semiconductor memory device

#17
20050269646
2005-12-08

Memory device

#18
20050230748
2005-10-20

Semiconductor memory device and manufacturing method therefor

#19
20050205943
2005-09-22

Memory having reduced memory cell size

#20
20050127406
2005-06-16

Semiconductor integrated circuit device and method of producing the same

#21
20050042813
2005-02-24

Method of manufacturing non-volatile semiconductor memory device and method for controlling same

#22
20050029578
2005-02-10

Two-bit cell semiconductor memory device

#23
20050023564
2005-02-03

Arrays of nonvolatile memory cells wherein each cell has two conductive floating gates