240287 ⎘
Active solid-state devices, e.g. transistors, solid-state diodes Conductor layers on different levels connected in parallel, e.g. to reduce resistance
A SCALABLE POLYLITHIC ON-PACKAGE INTEGRATABLE APPARATUS AND METHOD
#2Nonvolatile memory device with recording layer having two portions of different nitrogen amounts
#3High performance system-on-chip using post passivation process
#4High performance system-on-chip using post passivation process
#5High performance system-on-chip using post passivation process
#6High performance system-on-chip using post passivation process
#7High performance system-on-chip using post passivation process
#8High performance system-on-chip using post passivation process
#9High performance system-on-chip using post passivation process
#10High performance system-on-chip using post passivation process
#11High performance system-on-chip using post passivation process
#12High performance system-on-chip using post passivation process
#13High performance system-on-chip using post passivation process
#14Structure and method for making high density MOSFET circuits with different height contact lines
#15Structure and method for making high density mosfet circuits with different height contact lines
#16Semiconductor device and production method thereof
#17High performance system-on-chip using post passivation process
#18Semiconductor device and production method thereof
#19Arrays of nonvolatile memory cells wherein each cell has two conductive floating gates