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Semiconductor device manufacturing: process Making oxide-nitride-oxide device
Methods of forming reverse mode non-volatile memory cell structures
#2Planarized passivation layer for semiconductor devices
#3Dual charge storage node memory device and methods for fabricating such device
#4Method of processing a contact pad, method of manufacturing a contact pad, and integrated circuit element
#5Modification of charge trap silicon nitride with oxygen plasma
#6Self aligned narrow storage elements for advanced memory device
#7Method for forming a memory array
#8Semiconductor device and method for fabricating the same
#9Method of manufacturing semiconductor device
#10SONOS memory device with optimized shallow trench isolation
#11Memory device and fabrication method thereof
#12Method of processing a contact pad, method of manufacturing a contact pad, and integrated circuit element
#13Apparatus and associated method for making a virtual ground array structure that uses inversion bit lines
#14Methods of forming non-volatile memory having tunnel insulator of increasing conduction band offset
#15Method for manufacturing semiconductor device
#16OPERATING METHOD OF NON-VOLATILE MEMORY DEVICE
#17Method for fabricating semiconductor transistor
#18Single-wafer process for fabricating a nonvolatile charge trap memory device
#19Non-volatile memory device with buried control gate and method of fabricating the same
#20Self aligned narrow storage elements for advanced memory device
#21Planarized passivation layer for semiconductor devices
#22Forming Method and Forming System for Insulation Film
#23Non-volatile two-transistor semiconductor memory cell and method for producing the same
#24Methods of forming non-volatile memory device
#25Method for manufacturing device isolation film of semiconductor device
#26NROM fabrication method
#27NROM fabrication method
#28Bottom-gate sonos-type cell having a silicide gate
#29NROM fabrication method
#30Field effect transistors with dielectric source drain halo regions and reduced miller capacitance
#31Apparatus and associated method for making a virtual ground array structure that uses inversion bit lines
#32Method for forming salicide in semiconductor device
#33Memory device and fabrication method thereof
#34Method of manufacturing nonvolatile semiconductor memory device
#35Structure and method for a sidewall SONOS memory device
#36Non-volatile memory device with a silicon nitride charge holding film having an excess of silicon
#37Method for nitridation of the interface between a dielectric and a substrate in a MOS device
#38Structure and method for a sidewall SONOS memory device
#39Field effect transistors with dielectric source drain halo regions and reduced miller capacitance
#40Semiconductor device and method for manufacturing the same
#41High performance CMOS transistors using PMD liner stress
#42Method for forming oxide on ONO structure
#43Forming method and forming system for insulation film
#44Non-volatile memory device and manufacturing method and operating method thereof
#45Flash memory structure and method for fabricating the same
#46Method of manufacturing a charge-trapping dielectric and method of manufacturing a sonos-type non-volatile semiconductor device
#47Protective layer in memory device and method therefor
#48Low power non-volatile memory and gate stack
#49Process for producing semiconductor nonvolatile memory cell array
#50Four-bit finfet NVRAM memory device
#51Semiconductor memory device and method for manufacturing semiconductor device
#52Bottom-gate SONOS-type cell having a silicide gate
#53Method of manufacturing semiconductor device
#54Memory Device and Method of Manufacturing Including Deuterated Oxynitride Charge Trapping Structure
#55High reflector tunable stress coating, such as for a MEMS mirror
#56High reflector tunable stress coating, such as for a MEMS mirror
#57Non-volatile memory device and manufacturing method and operating method thereof
#58System and method for suppressing oxide formation
#59Non-volatile memory device with buried control gate and method of fabricating the same
#60Semiconductor device
#61Memory device and method of manufacturing including deuterated oxynitride charge trapping structure
#62Method of fabricating a non-volatile memory
#63Method of fabricating non-volatile memory device having local SONOS gate structure
#64Method for manufacturing device isolation film of semiconductor device
#65Semiconductor nonvolatile memory cell array
#66Flash memory device and method for fabricating the same
#67Method for fabricating a nonvolatile sonos memory device
#68High performance CMOS transistors using PMD liner stress
#69Two bit/four bit SONOS flash memory cell
#70ONO formation method
#71ONO formation method
#72Organic semiconductor film and organic semiconductor device
#73Non-volatile semiconductor memory device and process for fabricating the same
#74Method of manufacturing a non-volatile semiconductor memory device
#75Non-volatile semiconductor memory device and process for fabricating the same
#76Non-volatile semiconductor memory device and process for fabricating the same
#77Non-volatile semiconductor memory device and process for fabricating the same
#78Memory device and fabrication method thereof
#79Non-volatile semiconductor memory device and process for fabricating the same
#80Method for manufacturing semiconductor device
#81Non-volatile memory cell with dielectric spacers along sidewalls of a component stack, and method for forming same
#82Flash memory device and fabricating method thereof
#83Hydrogen free integration of high-k gate dielectrics
#84Non-volatile two-transistor semiconductor memory cell and method for producing the same
#85Method for forming oxide on ONO structure
#86Method for forming nitrided tunnel oxide layer
#87Nonvolatile integrated semiconductor memory
#88Local SONOS-type structure having two-piece gate and self-aligned ONO and method for manufacturing the same
#89Method and composite for decreasing charge leakage