ClassID:

242056

Y10S438/967 - CPC Classification

Classification description:

Semiconductor device manufacturing: process Semiconductor on specified insulator

Recent Application in this class:
#1
20120322228
2012-12-20

Method for forming SOI substrate and apparatus for forming the same

#2
20120161300
2012-06-28

Ionizing radiation blocking in IC chip to reduce soft errors

#3
20110253982
2011-10-20

Vertical group III-V nanowires on si, heterostructures, flexible arrays and fabrication

#4
20100237459
2010-09-23

Process for manufacturing a wafer by annealing of buried channels

#5
20090246935
2009-10-01

Method for producing SOI substrate

#6
20090039515
2009-02-12

Ionizing radiation blocking in IC chip to reduce soft errors

#7
20090032831
2009-02-05

Optical waveguide apparatus and method for manufacturing the same

#8
20080302559
2008-12-11

Flexible and elastic dielectric integrated circuit

#9
20080277690
2008-11-13

STRAINED SILICON-ON-INSULATOR BY ANODIZATION OF A BURIED p+ SILICON GERMANIUM LAYER

#10
20080118757
2008-05-22

Method for manufacturing SOQ substrate

#11
20080036030
2008-02-14

Process for manufacturing a wafer by annealing of buried channels

#12
20070269960
2007-11-22

Fabrication of substrates with a useful layer of monocrystalline semiconductor material

#13
20070259526
2007-11-08

Surface finishing of SOI substrates using an EPI process

#14
20070207612
2007-09-06

Selective heating using flash anneal

#15
20070111463
2007-05-17

Strained silicon-on-insulator by anodization of a buried p+ silicon germanium layer

#16
20060079073
2006-04-13

Fabrication method of nitride semiconductors and nitride semiconductor structure fabricated thereby

#17
20060063358
2006-03-23

Method for preventing sidewall consumption during oxidation of SGOI islands

#18
20060017131
2006-01-26

Process for manufacturing an SOI wafer by annealing and oxidation of buried channels

#19
20060003555
2006-01-05

Strained silicon-on-insulator by anodization of a buried p+ silicon germanium layer

#20
20050282401
2005-12-22

Zeolite films for low k applications

#21
20050266663
2005-12-01

Method of forming lattice-matched structure on silicon and structure formed thereby

#22
20050176174
2005-08-11

Method of making an integrated circuit

#23
20050156265
2005-07-21

Lithography device for semiconductor circuit pattern generation

#24
20050142875
2005-06-30

Selective heating using flash anneal

#25
20050133812
2005-06-23

Fabrication method of nitride semiconductors and nitride semiconductor structure fabricated thereby

#26
20050118934
2005-06-02

Method for shaping an air bearing surface of a magnetic head slider

#27
20050082641
2005-04-21

Flexible and elastic dielectric integrated circuit

#28
20050082626
2005-04-21

Membrane 3D IC fabrication

#29
20050074951
2005-04-07

Selective heating using flash anneal

#30
20050051841
2005-03-10

Stress-controlled dielectric integrated circuit