ClassID:

242063

Y10S438/974 - CPC Classification

Classification description:

Semiconductor device manufacturing: process Substrate surface preparation

Recent Application in this class:
#1
20160322328
2016-11-03

Method for low temperature bonding and bonded structure

#2
20160086913
2016-03-24

Method for low temperature bonding and bonded structure

#3
20150303263
2015-10-22

Method for low temperature bonding and bonded structure

#4
20150221766
2015-08-06

Semiconductor device having a field-effect structure and a nitrogen concentration profile

#5
20140370687
2014-12-18

Controlled process and resulting device

#6
20140206176
2014-07-24

Method for low temperature bonding and bonded structure

#7
20140097488
2014-04-10

Method for producing a semiconductor device and field-effect semiconductor device

#8
20130143389
2013-06-06

Controlled process and resulting device

#9
20120262433
2012-10-18

Organic light emitting diode display with improved crystallinity of driving semiconductor

#10
20120238043
2012-09-20

Semiconductor device manufacturing method

#11
20120145990
2012-06-14

Nanowire growth on dissimilar material

#12
20120097638
2012-04-26

Method For Low Temperature Bonding And Bonded Structure

#13
20110294306
2011-12-01

CONTROLLED PROCESS AND RESULTING DEVICE

#14
20110253982
2011-10-20

Vertical group III-V nanowires on si, heterostructures, flexible arrays and fabrication

#15
20110067803
2011-03-24

Method for low temperature bonding and bonded structure

#16
20100282323
2010-11-11

Controlled process and resulting device

#17
20100252808
2010-10-07

Growth of III-V compound semiconductor nanowires on silicon substrates

#18
20100216304
2010-08-26

METHOD FOR FORMING TI FILM AND TIN FILM, CONTACT STRUCTURE, COMPUTER READABLE STORAGE MEDIUM AND COMPUTER PROGRAM

#19
20100163169
2010-07-01

Method for low temperature bonding and bonded structure

#20
20100032805
2010-02-11

Methods and structures for relaxation of strained layers

#21
20090302319
2009-12-10

Organic light emitting diode display with improved on-current, and method for manufacturing the same

#22
20090267192
2009-10-29

CMP methods avoiding edge erosion and related wafer

#23
20090263953
2009-10-22

Method for low temperature bonding and bonded structure

#24
20090181477
2009-07-16

Methods of designing an integrated circuit on corrugated substrate

#25
20090149012
2009-06-11

METHOD OF FORMING A NONPLANAR TRANSISTOR WITH SIDEWALL SPACERS

#26
20090061545
2009-03-05

Edge removal of silicon-on-insulator transfer wafer

#27
20080290470
2008-11-27

Integrated circuit on corrugated substrate

#28
20080286945
2008-11-20

Controlled process and resulting device

#29
20080216921
2008-09-11

Leadframe treatment for enhancing adhesion of encapsulant thereto

#30
20080182386
2008-07-31

Controlled cleaving process

#31
20080138987
2008-06-12

Edge removal of silicon-on-insulator transfer wafer

#32
20080090397
2008-04-17

Nonplanar transistors with metal gate electrodes

#33
20080063878
2008-03-13

Method for low temperature bonding and bonded structure

#34
20080053959
2008-03-06

Method for low temperature bonding and bonded structure

#35
20070278178
2007-12-06

Copper conducting wire structure and fabricating method thereof

#36
20070257372
2007-11-08

Method for forming Ti film and TiN film, contact structure, computer readable storing medium and computer program

#37
20070193682
2007-08-23

Bonding method and apparatus

#38
20070161199
2007-07-12

Method for manufacturing SOI wafer

#39
20070132053
2007-06-14

Integrated circuit on corrugated substrate

#40
20070123013
2007-05-31

Controlled process and resulting device

#41
20070122995
2007-05-31

Controlled process and resulting device

#42
20070059904
2007-03-15

Method of manufacturing silicon wafer

#43
20070054466
2007-03-08

Semiconductor-on-insulator type heterostructure and method of fabrication

#44
20070001232
2007-01-04

Integrated circuit on corrugated substrate

#45
20060273067
2006-12-07

Polarizer based on a nanowire grid

#46
20060270078
2006-11-30

Method of fabricating light emitting diode package

#47
20060269729
2006-11-30

Copper conducting wire structure and fabricating method thereof

#48
20060264008
2006-11-23

Surface treatment after selective etching

#49
20060261445
2006-11-23

INTEGRATED CIRCUIT DEVICE WITH TREATED PERIMETER EDGE

#50
20060189102
2006-08-24

Process for treating substrates for the microelectronics industry, and substrates obtained by this process

#51
20060141747
2006-06-29

Controlled cleaving process

#52
20060138553
2006-06-29

Method of forming a metal oxide dielectric

#53
20060138552
2006-06-29

Method of forming metal gate electrodes using sacrificial gate electrode material and sacrificial gate dielectric material

#54
20060131696
2006-06-22

Semiconductor wafer with ID mark, equipment for and method of manufacturing semiconductor device from them

#55
20060115986
2006-06-01

Edge removal of silicon-on-insulator transfer wafer

#56
20060076040
2006-04-13

Semiconductive substrate cleaning systems

#57
20060071275
2006-04-06

Nonplanar transistors with metal gate electrodes

#58
20050221593
2005-10-06

Selective growth method, and semiconductor light emitting device and fabrication method thereof

#59
20050186758
2005-08-25

Controlled cleaving process

#60
20050130429
2005-06-16

Surface treatment for multi-layer wafers formed from layers of materials chosen from among semiconducting materials

#61
20050092431
2005-05-05

Chemical processing method, and method of manufacturing semiconductor device

#62
20050079712
2005-04-14

Method for low temperature bonding and bonded structure

#63
20050032367
2005-02-10

Passivation processes for use with metallization techniques

#64
20050032318
2005-02-10

Method for making a semiconductor device having a high-k gate dielectric

#65
20050025691
2005-02-03

Method for heat treatment of silicon wafers and silicon wafer