242064 ⎘
Semiconductor device manufacturing: process Substrate or mask aligning feature
Apparatus and methods for detecting overlay errors using scatterometry
#2Lithography alignment marks
#3Apparatus for measuring overlay errors
#4Semiconductor device having a high-K gate dielectric above an STI region
#5Self aligned contact formation
#6Semiconductor apparatus and substrate
#7Method for manufacturing semiconductor substrate
#8Method for manufacturing semiconductor substrate
#9Systems and methods for plasma etching compound semiconductor (CS) dies and passively aligning the dies
#10Self aligned contact formation
#11System and method for improved automated semiconductor wafer manufacturing
#12WH (wafer-holder) process
#13Multiple-points measurement
#14Heterogeneous chip integration with low loss interconnection through adaptive patterning
#15Semiconductor apparatus and substrate
#16Solid-state image pickup device and a method of manufacturing the same
#17Manufacturing method for exposure mask, generating method for mask substrate information, mask substrate, exposure mask, manufacturing method for semiconductor device and server
#18Alignment marks for polarized light lithography and method for use thereof
#19Apparatus and methods for determining overlay of structures having rotational or mirror symmetry
#20Stacking apparatus and method for stacking integrated circuit elements
#21Method for manufacturing a radiation imaging panel comprising imaging tiles
#22Method and apparatus for measurement and control of photomask to substrate alignment
#23Manufacturing method for exposure mask, generating method for mask substrate information, mask substrate, exposure mask, manufacturing method for semiconductor device and server
#24METHOD OF MANUFACTURING A SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
#25Semiconductor substrates comprising through substrate interconnects that are visible on the substrate backside
#26Solid-state imaging device and method of manufacturing solid-state imaging device
#27Method of forming a semiconductor device an alignment mark formed in a groove
#28Chip package and fabrication method thereof
#29Method for manufacturing semiconductor substrate
#30Method and apparatus for measurement and control of photomask to substrate alignment
#31Method and apparatus for measurement and control of photomask to substrate alignment
#32Electronic device, method for manufacturing the same, and silicon substrate for electronic device
#33Solid-state imaging device and method of manufacturing solid-state imaging device
#34Method for manufacturing a radiation imaging panel comprising imaging tiles
#35Solid-state image pickup device and a method of manufacturing the same
#36Substrate with check mark and method of inspecting position accuracy of conductive glue dispensed on the substrate
#37System and method for improved automated semiconductor wafer manufacturing
#38Method of manufacturing semiconductor device
#39Alignment marks for polarized light lithography and method for use thereof
#40MEMS devices and methods of assembling micro electromechanical systems (MEMS)
#41Method to align mask patterns
#42Integrated circuit package system with package substrate having corner contacts and method of manufacture thereof
#43Solar cell fabrication using extrusion mask
#44Deterministic generation of an integrated circuit identification number
#45Method of manufacturing a CMOS image sensor
#46Semiconductor device manufacturing method
#47Overlay marks and methods of manufacturing such marks
#48Semiconductor Substrate and Method for Manufacturing the Same
#49Substrate with check mark and method of inspecting position accuracy of conductive glue dispensed on the substrate
#50High-contrast laser mark on substrate surfaces
#51Exposure apparatus, exposure method, and device manufacturing method
#52Display substrate and method of manufacturing the same
#53Apparatus and methods for determining overlay of structures having rotational or mirror symmetry
#54Method to control semiconductor device overlay using post etch image metrology
#55Method for manufacturing semiconductor device
#56Integrated circuit package system with package substrate having corner contacts
#57Semiconductor substrate including first and second recognition marks and method for manufacturing semiconductor device
#58Structure and method for determining an overlay accuracy
#59Method and apparatus for measurement and control of photomask to substrate alignment
#60Substrate provided with an alignment mark in a substantially transmissive process layer, mask for exposing said mark, device manufacturing method, and device manufactured thereby
#61Method for integration of magnetic random access memories with improved lithographic alignment to magnetic tunnel junctions
#62Method for self-aligned removal of a high-K gate dielectric above an STI region
#63Apparatus and methods for determining overlay of structures having rotational or mirror symmetry
#64Maunfacturing method for exposure mask, generating method for mask substrate information, mask substrate, exposure mask, manufacturing method for semiconductor device and server
#65Method of forming a multi-level interconnect structure by overlay alignment procedures
#66Solid-state imaging device and method of manufacturing solid-state imaging device
#67Stacking apparatus and method for stacking integrated circuit elements
#68Method and apparatus for wafer marking
#69Intermediate semiconductor device structures
#70METHOD AND STRUCTURE FOR IMPROVED ALIGNMENT IN MRAM INTEGRATION
#71Exposure apparatus, exposure method, and device manufacturing method
#72Electronic device, method for manufacturing the same, and silicon substrate for electronic device
#73METHOD AND STRUCTURE FOR IMPROVED ALIGNMENT IN MRAM INTEGRATION
#74Top contact alignment in semiconductor devices
#75Method and structure for improved alignment in MRAM integration
#76Method for fabricating semiconductor wafer with enhanced alignment performance
#77Solar cell fabrication using extrusion mask
#78High-contrast laser mark on substrate surfaces
#79Fabrication Methods for Micro Compound Optics
#80Alignment mark, use of a hard mask material, and method
#81Overlay marks, methods of overlay mark design and methods of overlay measurements
#82Marker for alignment of non-transparent gate layer, method for manufacturing such a marker, and use of such a marker in a lithographic apparatus
#83Method of correcting for pattern run out
#84Methods of determining x-y spatial orientation of a semiconductor substrate comprising an integrated circuit, methods of positioning a semiconductor substrate comprising an integrated circuit, methods of processing a semiconductor substrate, and semiconductor devices
#85Polysilicon hard mask for enhanced alignment signal
#86Solid-state imaging device and method of manufacturing solid-state imaging device
#87Method and system for enhanced lithographic alignment
#88Method and structure for improved alignment in MRAM integration
#89Compact camera module and the substrate thereof
#90Semiconductor wafer and manufacturing method thereof
#91Method to align mask patterns
#92Methods for forming alignment marks on semiconductor devices
#93Method of reducing film stress on overlay mark
#94Semiconductor integrated circuit device fabrication method
#95Semiconductor device having align mark layer and method of fabricating the same
#96MASK-MAKING MEMBER AND ITS PRODUCTION METHOD, MASK AND ITS MAKING METHOD, EXPOSURE PROCESS, AND FABRICATION METHOD OF SEMICONDUCTOR DEVICE
#97Semiconductor device having align key and method of fabricating the same
#98CMOS image sensor
#99Semiconductor device manufacturing method
#100Overlay mark
#101Manufacturable single-chip hydrogen sensor
#102Mask, method of producing mask, and method of producing semiconductor device
#103Mask, method of producing mask, and method of producing semiconductor device
#104Alignment marks for polarized light lithography and method for use thereof
#105Method for manufacturing a thin-film transistor
#106System and method for calculating a shift value between pattern instances
#107Methods and apparatus for high-density chip connectivity
#108Apparatus and methods for determining overlay of structures having rotational or mirror symmetry
#109Chip and multi-chip semiconductor device using the chip, and method for manufacturing same
#110Phase contrast microscope for short wavelength radiation and imaging method
#111Method of aligning a reticle for formation of semiconductor devices
#112Thin-film semiconductor substrate, method of manufacturing thin-film semiconductor substrate, method of crystallization, apparatus for crystallization, thin-film semiconductor device, and method of manufacturing thin-film semiconductor device
#113Fabricating nanoscale and atomic scale devices
#114Stacking apparatus and method for stacking integrated circuit elements
#115Solid-state imaging device and method of manufacturing solid-state imaging device
#116Method to align mask patterns
#117Alignment mark and alignment method for the fabrication of trench-capacitor dram devices
#118Overlay marks, methods of overlay mark design and methods of overlay measurements
#119Process for the aligned manufacture of electronic semiconductor devices in a SOI substrate
#120Overlay marks, methods of overlay mark design and methods of overlay measurements
#121Semiconductor substrate having reference semiconductor chip and method of assembling semiconductor chip using the same
#122Substrate provided with an alignment mark in a substantially transmissive process layer, mask for exposing said mark, device manufacturing method, and device manufactured thereby
#123Semiconductor constructions and methods of forming semiconductor constructions
#124Wafer alignment method
#125Fabricating method of semiconductor optical device for flip-chip bonding
#126Deterministic generation of an integrated circuit identification number
#127Semiconductor package and semiconductor package mounting method
#128Domain reversal control method for ferroelectric materials
#129Method to align mask patterns
#130Overlay marks, methods of overlay mark design and methods of overlay measurements
#131Methods for reducing a thickness variation of a nitride layer formed in a shallow trench isolation CMP process and for forming a device isolation film of a semiconductor device
#132Method and resulting structure for manufacturing semiconductor substrates
#133Semiconductor constructions
#134Reduced leakage semiconductor device
#135Raised-lines overlay semiconductor targets and method of making the same
#136Marker for alignment of non-transparent gate layer, method for manufacturing such a marker, and use of such a marker in a lithographic apparatus
#137Semiconductor constructions
#138Semiconductor constructions
#139Method of reducing alignment measurement errors between device layers
#140Manufacturing method for exposure mask, generating method for mask substrate information, mask substrate, exposure mask, manufacturing method for semiconductor device and server
#141Method of fabricating an apparatus including a sealed cavity
#142Method of reducing film stress on overlay mark
#143Manufacturing method for semiconductor device and determination method for position of semiconductor element
#144Semiconductor wafer and manufacturing method thereof
#145Mask-making member and its production method, mask and its making method, exposure process, and fabrication method of semiconductor device
#146Method of manufacturing a semiconductor device having an alignment mark
#147Chip and multi-chip semiconductor device using thereof and method for manufacturing same
#148Method to avoid a laser marked area step height
#149Method of forming patterns
#150Lamination through a mask
#151Patterning method
#152Method for forming alignment pattern of semiconductor device
#153Substrate, method of preparing a substrate, method of measurement, lithographic apparatus, device manufacturing method and device manufactured thereby, and machine-readable storage medium
#154Semiconductor device having align key and method of fabricating the same
#155Solid-state imaging device and method of manufacturing solid-state imaging device background of the invention
#156Method for manufacturing semiconductor device
#157Alignment mark structure
#158Low power flash memory cell and method
#159Mask for exposing an alignment mark, and method and computer program for designing the mask
#160Methods for exposing device features on a semiconductor device
#161Process independent alignment marks
#162Overlay mark and method of fabricating the same
#163Raised-lines overlay semiconductor targets and method of making the same
#164System and method of pattern recognition and metrology structure for an X-initiative layout design
#165Box-in-box field-to-field alignment structure
#166Substrate provided with an alignment mark in a substantially transmissive process layer, mask for exposing said mark, device manufacturing method, and device manufactured thereby
#167Wafer cleaning method and resulting wafer
#168Wafer Cleaning method and resulting wafer
#169Method of manufacturing a semiconductor device with outline of cleave marking regions and alignment or registration features
#170Method of dividing a semiconductor wafer utilizing a laser dicing technique
#171Method of maintaining photolithographic precision alignment after wafer bonding process
#172Thin-film semiconductor substrate, method of manufacturing thin-film semiconductor substrate, method of crystallization, apparatus for crystallization, thin-film semiconductor device, and method of manufacturing thin-film semiconductor device
#173Thin film transistor formed on a transparent substrate
#174Alignment mark and method for manufacturing a semiconductor device having the same
#175Substrate for semiconductor package and wire bonding method using thereof