Inventor profile of:

Helmut Oefner

City:

Zorneding

Country:

Germany

Published Applications:

26

Last publication date:

2023-12-07

Top Assignees for applications by Helmut Oefner

The entities that hold a legal rights for patent applications filed by inventor Oefner Helmut:

Recent patent applications by Oefner Helmut

Helmut Oefner from Zorneding, DE has applied for patents for these inventions. The list has both pending applications and granted patents:

#1 | 2023-12-07
US20230395394A1
Electricity

Methods for forming a semiconductor device having a second semiconductor layer on a first semiconductor layer

#2 | 2022-02-10
US20220042204A1
Chemistry; metallurgy

Method of Manufacturing CZ Silicon Wafers

#3 | 2022-02-03
US20220037165A1
Electricity

Methods for forming a semiconductor device

#4 | 2020-07-16
US20200224326A1
Chemistry; metallurgy

Method of manufacturing CZ silicon wafers, and method of manufacturing a semiconductor device

#5 | 2020-05-21
US20200161424A1
Electricity

Semiconductor device, silicon wafer and method of manufacturing a silicon wafer

#6 | 2019-08-15
US20190249330A1
Chemistry; metallurgy

Method of manufacturing CZ silicon wafers, and method of manufacturing a semiconductor device

#7 | 2019-03-21
US20190088482A1
Electricity

Doping method

#8 | 2018-12-06
US20180350612A1
Electricity

Methods of planarizing SiC surfaces

#9 | 2018-04-12
US20180102423A1
Electricity

Semiconductor device having a variable carbon concentration

#10 | 2018-04-05
US20180097064A1
Electricity

Semiconductor device, silicon wafer and method of manufacturing a silicon wafer

#11 | 2018-03-29
US20180088042A1
Physics

Method and assembly for determining the carbon content in silicon

#12 | 2018-01-04
US20180002826A1
Chemistry; metallurgy

Method of manufacturing CZ silicon wafers, and method of manufacturing a semiconductor device

#13 | 2017-11-02
US20170316929A1
Electricity

Semiconductor device having a defined oxygen concentration

#14 | 2017-09-14
US20170263440A1
Electricity

Method of reducing defects in an epitaxial layer

#15 | 2017-06-15
US20170170028A1
Electricity

Method for processing a silicon wafer

#16 | 2017-05-18
US20170141049A1
Electricity

Wafer edge shape for thin wafer processing

#17 | 2017-04-13
US20170103882A1
Electricity

Method of manufacturing semiconductor wafers and method of manufacturing a semiconductor device

#18 | 2017-03-02
US20170062568A1
Electricity

SEMICONDUCTOR DEVICE, SILICON WAFER AND METHOD OF MANUFACTURING A SILICON WAFER

#19 | 2017-01-03
US14821992
Electricity

Single crystal ingot, semiconductor wafer and method of manufacturing semiconductor wafers

#20 | 2016-10-06
US20160293712A1
Electricity

Semiconductor wafer and manufacturing method

#21 | 2016-05-19
US20160141399A1
Electricity

Method for forming a semiconductor device and a semiconductor device

#22 | 2016-04-14
US20160104622A1
Electricity

Method for manufacturing a semiconductor wafer, and semiconductor device having a low concentration of interstitial oxygen

#23 | 2016-04-07
US20160099186A1
Electricity

Method for postdoping a semiconductor wafer

#24 | 2016-03-03
US20160064206A1
Electricity

Method for processing an oxygen containing semiconductor body

#25 | 2015-12-24
US20150371858A1
Electricity

Method for treating a semiconductor wafer

#26 | 2015-02-19
US20150050754A1
Electricity

Method for postdoping a semiconductor wafer

InventorID:

1072886 ⎘