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Inventor profile of:

Arnaud Castex

City:

Grenoble

Country:

France

Published Applications:

Last publication date:

2025-05-01

Top Assignees for applications by Arnaud Castex

The entities that hold a legal rights for patent applications filed by inventor Castex Arnaud:

SOITEC 16 Bernin, France
S.O.I.TEC SILICON ON INSULATOR TECHNOLOGIES 4 Crolles Cedex, France
S.O.I.TEC SILICON ON INSULATOR TECHNOLOGIES 1 Crolles Cedex, FR France
Sony Semiconductors Solutions Corporation 1 Kanagawa, Japan
SOITEC 1 Bemin, France
S.O.I. Tec Silicon on Insulator Technologies Parc Technologique dws Fontaines 1 Bernin, France
SOITEC 1 Crolles Cedex, France
SOITEC 1 Brenin, France

Recent patent applications by Castex Arnaud

Arnaud Castex from Grenoble, FR has applied for patents for these inventions. The list has both pending applications and granted patents:

#1 | 2025-05-01

US20250140603A1

Electricity

METHOD FOR MANUFACTURING A SEMICONDUCTOR-ON-INSULATOR SUBSTRATE

#2 | 2024-11-28

US20240396520A1

Electricity

HETEROSTRUCTURE AND METHOD OF FABRICATION

#3 | 2024-01-25

US20240030883A1

Electricity

PROCESS FOR MANUFACTURING A PIEZOELECTRIC STRUCTURE FOR A RADIOFREQUENCY DEVICE AND WHICH CAN BE USED TO TRANSFER A PIEZOELECTRIC LAYER, AND PROCESS FOR TRANSFERRING SUCH A PIEZOELECTRIC LAYER

#4 | 2023-08-31

US20230275559A1

Electricity

Heterostructure and method of fabrication

#5 | 2023-07-27

US20230238274A1

Electricity

SEMICONDUCTOR-ON-INSULATOR SUBSTRATE FOR RF APPLICATIONS

#6 | 2022-05-05

US20220139768A1

Electricity

Method for manufacturing a semiconductor-on-insulator substrate

#7 | 2021-02-25

US20210058058A1

Electricity

Heterostructure and method of fabrication

#8 | 2021-02-25

US20210057269A1

Electricity

Semiconductor-on-insulator substrate for rf applications

#9 | 2020-09-03

US20200280298A1

Electricity

Heterostructure and method of fabrication

#10 | 2019-04-18

US20190115248A1

Electricity

Semiconductor-on-insulator substrate for RF applications

#11 | 2018-06-07

US20180159498A1

Electricity

Heterostructure and method of fabrication

#12 | 2015-08-20

US20150235851A1

Electricity

Method for bonding by means of molecular adhesion

#13 | 2015-06-25

US20150179603A1

Electricity

Method for producing composite structure with metal/metal bonding

#14 | 2013-05-02

US20130105061A1

Performing operations; transporting

Method and apparatus for bonding together two wafers by molecular adhesion

#15 | 2013-04-18

US20130093033A9

Electricity

THREE DIMENSIONAL STRUCTURES HAVING IMPROVED ALIGNMENTS BETWEEN LAYERS OF MICROCOMPONENTS

#16 | 2013-02-28

US20130054154A1

Physics

System and method for assessing inhomogeneous deformations in multilayer plates

#17 | 2012-12-20

US20120322229A1

Electricity

METHOD FOR BONDING TWO SUBSTRATES

#18 | 2012-06-28

US20120164778A1

Electricity

Method of bonding by molecular bonding

#19 | 2012-03-29

US20120077329A1

Electricity

Direct bonding method with reduction in overlay misalignment

#20 | 2012-02-02

US20120028440A1

Electricity

Method of fabricating a multilayer structure with circuit layer transfer

#21 | 2011-11-24

US20110287604A1

Electricity

METHODS OF FORMING SEMICONDUCTOR STRUCTURES COMPRISING DIRECT BONDING OF SUBSTRATES

#22 | 2011-11-17

US20110278691A1

Electricity

THREE DIMENSIONAL STRUCTURES HAVING IMPROVED ALIGNMENTS BETWEEN LAYERS OF MICROCOMPONENTS

#23 | 2011-08-04

US20110189834A1

Electricity

Surface treatment for molecular bonding

#24 | 2011-02-24

US20110045611A1

Electricity

Method of initiating molecular bonding

#25 | 2010-06-24

US20100155882A1

Electricity

METHOD FOR BONDING TWO SUBSTRATES

InventorID:

117930 ⎘