Folsom, California
United States
44
2025-12-25
The entities that hold a legal rights for patent applications filed by inventor ASHBAUGH Ben:
Ben ASHBAUGH from Folsom, US has applied for patents for these inventions. The list has both pending applications and granted patents:
MULTI-TILE GRAPHICS PROCESSING UNIT
#2 | 2025-06-19MULTI-TILE GRAPHICS PROCESSING UNIT
#3 | 2025-03-27SYSTEMS AND METHODS FOR IMPROVING CACHE EFFICIENCY AND UTILIZATION
#4 | 2025-02-27SCALAR CORE INTEGRATION
#5 | 2025-01-23GRAPHICS PROCESSOR OPERATION SCHEDULING FOR DETERMINISTIC LATENCY
#6 | 2024-10-17Multi-tile Memory Management for Detecting Cross Tile Access Providing Multi-Tile Inference Scaling and Providing Page Migration
#7 | 2024-09-26MULTI-TILE ARCHITECTURE FOR GRAPHICS OPERATIONS
#8 | 2024-08-01DATA PREFETCHING FOR GRAPHICS DATA PROCESSING
#9 | 2024-04-04ORDERED THREAD DISPATCH FOR THREAD TEAMS
#10 | 2024-02-29Compression of machine learning models utilizing pseudo-labeled data training
#11 | 2024-02-08Scalar core integration
#12 | 2024-01-25THREAD GROUP SCHEDULING FOR GRAPHICS PROCESSING
#13 | 2023-07-20Dynamic assignment of down sampling intervals for data stream processing
#14 | 2023-02-16Multi-tile graphics processing unit
#15 | 2023-02-16Data prefetching for graphics data processing
#16 | 2023-02-09WORKLOAD SCHEDULING AND DISTRIBUTION ON A DISTRIBUTED GRAPHICS DEVICE
#17 | 2023-01-26Scalar core integration
#18 | 2022-08-18Systems and methods for improving cache efficiency and utilization
#19 | 2022-08-18Thread group scheduling for graphics processing
#20 | 2022-06-09Systems and methods for improving cache efficiency and utilization
#21 | 2022-05-19MULTI-TILE GRAPHICS PROCESSING UNIT
#22 | 2022-05-05COMPUTE OPTIMIZATION IN GRAPHICS PROCESSING
#23 | 2022-04-21Graphics processor operation scheduling for deterministic latency
#24 | 2022-04-14Multi-tile memory management for detecting cross tile access providing multi-tile inference scaling and providing page migration
#25 | 2022-04-07Multi-tile architecture for graphics operations
#26 | 2021-11-11Scalar core integration
#27 | 2021-09-09Systems and methods in a graphics environment for providing shared virtual memory addressing support for a host system
#28 | 2021-08-19Data prefetching for graphics data processing
#29 | 2021-08-05Workload scheduling and distribution on a distributed graphics device
#30 | 2021-06-24MECHANISM TO PARTITION A SHARED LOCAL MEMORY
#31 | 2021-02-25Partial write management in a multi-tiled compute engine
#32 | 2020-10-13Partial write management in a multi-tiled compute engine
#33 | 2020-09-17Scalar core integration
#34 | 2020-09-17Preemptive page fault handling
#35 | 2020-09-17Data prefetching for graphics data processing
#36 | 2020-09-17Thread group scheduling for graphics processing
#37 | 2020-09-17TRANSACTIONAL PAGE FAULT HANDLING
#38 | 2020-08-13Policy-based system interface for a real-time autonomous system
#39 | 2020-07-09Workload scheduling and distribution on a distributed graphics device
#40 | 2020-01-02Method and apparatus for simultaneously executing multiple contexts on a graphics engine
#41 | 2019-10-24MAINTAINING HIGH TEMPORAL CACHE LOCALITY BETWEEN INDEPENDENT THREADS HAVING THE SAME ACCESS PATTERN
#42 | 2019-07-04Compression in machine learning and deep learning processing
#43 | 2018-10-25Neural network optimization mechanism
#44 | 2015-06-11Block operation based acceleration
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