Bomy Chen

Recessed lighting detector

High Temperature Strain Gauge

AUTONOMOUS MINE MONITOR

Factory Monitor

SYSTEMS AND METHODS FOR SOUND-BASED MONITORING OF A SPACE

MONOLITHIC EMBEDDED GaN IN SILICON CMOS

DRONE BASED PRECISION AGRICULTURE FIELD MANAGEMENT SYSTEM

TRANSISTOR DEVICE INCLUDING ENCLOSED VOIDS BELOW A CHANNEL REGION AND METHODS OF FORMING

LINE OF SIGHT DISPLAY FOR AUGMENTED REALITY

HIGHLY INTEGRATED ENVIRONMENTAL SENSOR

MULTI-PROCESS SELF-CLEANING DEVICE

INTEGRATED DEVICES AND METHOD FOR MANUFACTURING SAME

SENSOR INCLUDING AN ANODIZED POROUS LAYER AND METHOD OF FORMING A SENSOR

CHIPLET SiP - SECURING SUPPLY CHAIN INTEGRITY WITH SECURE-IP IN INTERPOSER/BRIDGE

THERMAL INTERFACE MATERIAL HEAT TRANSFER ANTENNAS

VAPOR CELLS AND RELATED SYSTEMS AND METHODS

APPARATUS FOR CONTROLLING VAPOR PRESSURE OF A SUBJECT MATERIAL CONTAINED THEREIN, AND RELATED METHODS AND SYSTEMS

HIGH ELECTRON MOBILITY TRANSISTOR AND METHOD FOR MANUFACTURING SAME

HIGH DEFECT SiC WAFER WITH DEVICE LAYER AND METHODS OF MANUFACTURE

SHIELDING PARTICLES COATED WITH ELECTRICAL INSULATION

High Electron Mobility Transistor and Method for Manufacturing Same

INDUCTIVE SENSOR DEVICE WITH INDUCTOR COIL FORMED IN REDISTRIBUTION LAYER (RDL) REGION

HYBRID SEMICONDUCTOR WAFER AND METHOD OF FORMING

INTERPOSER WITH LINES HAVING PORTIONS SEPARATED BY BARRIER LAYERS

INTEGRATED CIRCUIT (IC) PACKAGE INCLUDING A CAPACITOR FORMED IN A CONDUCTIVE ROUTING REGION

INTEGRATED CIRCUIT (IC) PACKAGE INCLUDING AN INDUCTIVE DEVICE FORMED IN A CONDUCTIVE ROUTING REGION

METHOD FOR FABRICATING A PATTERNED FD-SOI WAFER

VAPOR CELLS AND RELATED SYSTEMS AND METHODS

INTEGRATED CIRCUIT PACKAGE WITH BACKSIDE LEAD FOR CLOCK TREE OR POWER DISTRIBUTION NETWORK CIRCUITS

Integrated circuit bond pad with multi-material toothed structure

Vapor cells and related systems and methods

Electronic device including interposers bonded to each other

Integrated circuit package module including a bonding system

INTEGRATED CIRCUIT PACKAGE WITH HEAT TRANSFER CHIMNEY INCLUDING THERMALLY CONDUCTIVE NANOPARTICLES

Integrated circuit bond pad with multi-material toothed structure

BACKSIDE INTERCONNECT FOR INTEGRATED CIRCUIT PACKAGE INTERPOSER

Integrated circuit (IC) package with integrated inductor having core magnetic field (B field) extending parallel to substrate

Integrated circuit (IC) device including a force mitigation system for reducing under-pad damage caused by wire bond

Flash memory cell adapted for low voltage and/or non-volatile performance

Mixed-orientation multi-die integrated circuit package with at least one vertically-mounted die

Integrated circuit (IC) device including a force mitigation system for reducing under-pad damage caused by wire bond

Memory cell with oxide cap and spacer layer for protecting a floating gate from a source implant

Dual Damascene Process for Forming Vias and Interconnects in an Integrated Circuit Structure

Sidewall-Type Memory Cell

Sacrificial alignment ring and self-soldering vias for wafer bonding

Non-volatile flash memory cell

Sidewall-type memory cell

High voltage double-diffused MOS (DMOS) device and method of manufacture

High voltage double-diffused MOS (DMOS) device and method of manufacture

High voltage double-diffused MOS (DMOS) device and method of manufacture

EEPROM memory cell with low voltage read path and high voltage erase/write path

Sidewall type memory cell

Resistive Memory Cell with Reduced Bottom Electrode