Sauerlach
Germany
24
2024-07-18
The entities that hold a legal rights for patent applications filed by inventor Meiser Andreas Peter:
Andreas Peter Meiser from Sauerlach, DE has applied for patents for these inventions. The list has both pending applications and granted patents:
Semiconductor Die with a Vertical Power Transistor Device
#2 | 2023-05-11Semiconductor Component Having A SiC Semiconductor Body
#3 | 2021-07-29Lateral trench transistor device
#4 | 2021-07-22Semiconductor component having a SiC semiconductor body
#5 | 2021-06-03Method of manufacturing a silicon carbide semiconductor device with trench gate structure and vertical pn junction between body region and drift structure
#6 | 2021-02-18Integrated Circuit and Bipolar Transistor
#7 | 2018-01-25Power transistor having perpendicularly-arranged field plates and method of manufacturing the same
#8 | 2016-12-29Method for Producing a Semiconductor Component with Insulated Semiconductor Mesas in a Semiconductor Body
#9 | 2015-07-30Vertical transistor component
#10 | 2014-10-09Semiconductor device having a through contact
#11 | 2014-07-31Semiconductor Device and Method for Manufacturing a Semiconductor Device
#12 | 2013-11-21Vertical transistor component
#13 | 2013-04-25Semiconductor device having a through contact and a manufacturing method therefor
#14 | 2013-03-28Semiconductor device with a semiconductor via and laterally connected electrode
#15 | 2013-02-07Semiconductor arrangement
#16 | 2013-01-03METHOD FOR PRODUCING A SEMICONDUCTOR DEVICE INCLUDING A DIELECTRIC LAYER
#17 | 2012-12-20Method and circuit for driving an electronic switch
#18 | 2012-12-06Lateral trench MESFET
#19 | 2012-12-06Lateral trench MESFET
#20 | 2012-10-18Method for forming a semiconductor device and a semiconductor device
#21 | 2012-06-14Method for producing a semiconductor component with insulated semiconductor mesas
#22 | 2012-06-14Semiconductor component with a semiconductor via
#23 | 2012-05-31Method of contacting a doping region in a semiconductor substrate
#24 | 2011-04-21Integrated circuit with ESD structure
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