Milpitas, California
United States
20
2017-12-14
The entities that hold a legal rights for patent applications filed by inventor LU Zhenyu:
Zhenyu LU from Milpitas, US has applied for patents for these inventions. The list has both pending applications and granted patents:
Method of forming a staircase in a semiconductor device using a linear alignment control feature
#2 | 2017-12-14Within-array through-memory-level via structures and method of making thereof
#3 | 2017-12-07Through-memory-level via structures between staircase regions in a three-dimensional memory device and method of making thereof
#4 | 2017-10-12Multi-tier three-dimensional memory devices including vertically shared source lines and method of making thereof
#5 | 2017-09-21Three-dimensional memory device containing annular etch-stop spacer and method of making thereof
#6 | 2017-08-24Three dimensional memory device containing discrete silicon nitride charge storage regions
#7 | 2017-08-17Self-aligned isolation dielectric structures for a three-dimensional memory device
#8 | 2017-08-17Multi-tier memory device with through-stack peripheral contact via structures and method of making thereof
#9 | 2017-08-10Multi-tier replacement memory stack structure integration scheme
#10 | 2017-06-06Three dimensional memory device with peripheral devices under dummy dielectric layer stack and method of making thereof
#11 | 2017-03-30Memory device containing cobalt silicide control gate electrodes and method of making thereof
#12 | 2017-03-02Method of making a multilevel memory stack structure using a cavity containing a sacrificial fill material
#13 | 2017-02-16Three-dimensional memory devices containing memory block bridges
#14 | 2017-01-10Three dimensional memory device with epitaxial semiconductor pedestal for peripheral transistors
#15 | 2016-12-27Three-dimensional memory devices having a single layer channel and methods of making thereof
#16 | 2016-12-27Three-dimensional memory device containing CMOS devices over memory stack structures
#17 | 2016-11-24Forming 3D memory cells after word line replacement
#18 | 2016-11-22Multi tier three-dimensional memory devices including vertically shared bit lines
#19 | 2016-09-20Three dimensional memory device with epitaxial semiconductor pedestal for peripheral transistors
#20 | 2015-10-15Method of making a vertical NAND device using a sacrificial layer with air gap and sequential etching of multilayer stacks
1324859 ⎘