Austin, Texas
United States
9
2026-03-12
The entities that hold a legal rights for patent applications filed by inventor DiLullo Jack:
Jack DiLullo from Austin, US has applied for patents for these inventions. The list has both pending applications and granted patents:
PESSIMISM REDUCTION IN VERY LARGE SCALE INTEGRATED (VLSI) CIRCUIT DESIGN USING NET-SPECIFIC K FACTORS
#2 | 2025-01-02TIMING CONSTRAINT AUTO-CREATION FOR INTEGRATED CIRCUIT TESTING
#3 | 2024-10-03TIMING ANALYSIS OF A DIGITAL INTEGRATED CIRCUIT USING INTENT BASED TIMING CONSTRAINTS
#4 | 2021-01-12Offline analysis of hierarchical electronic design automation derived data
#5 | 2019-11-28DYNAMIC UPDATE OF MACRO TIMING MODELS DURING HIGHER-LEVEL TIMING ANALYSIS
#6 | 2017-11-23Clock domain-independent abstracts
#7 | 2015-12-03Timing analysis of asynchronous clock domain crossings
#8 | 2010-10-21Modeling full and half cycle clock variability
#9 | 2010-05-06Specifying and validating untimed nets
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