Austin, Texas
United States
77
2012-10-11
59
2013-07-16
These are the the leading inventors for applications assigned to IBM Corporation:
IBM Corporation based in Austin, US has been assigned the rights to these inventions. The list includes both Pending Applications and Patent Grants:
Processor including age tracking of issue queue instructions
#2 | 2011-06-23 ✅ Patent 8,315,264 granted on 2012-11-20Network system using path health information for path selection
#3 | 2010-10-21 ✅ Patent 10,489,293 granted on 2019-11-26Information handling system with immediate scheduling of load operations
#4 | 2010-10-21 ✅ Patent 8,140,765 granted on 2012-03-20Information handling system with immediate scheduling of load operations in a dual-bank cache with single dispatch into write/read data flow
#5 | 2010-10-21 ✅ Patent 8,195,880 granted on 2012-06-05Information handling system with immediate scheduling of load operations in a dual-bank cache with dual dispatch into write/read data flow
#6 | 2010-10-21 ✅ Patent 8,140,756 granted on 2012-03-20Information handling system with immediate scheduling of load operations and fine-grained access to cache memory
#7 | 2010-10-21 ✅ Patent 8,185,371 granted on 2012-05-22Modeling full and half cycle clock variability
#8 | 2010-07-01 ✅ Patent 8,245,018 granted on 2012-08-14Processor register recovery after flush operation
#9 | 2010-06-24 ✅ Patent 8,041,928 granted on 2011-10-18Information handling system with real and virtual load/store instruction issue queue
#10 | 2010-06-24 ✅ Patent 8,103,852 granted on 2012-01-24Information handling system including a processor with a bifurcated issue queue
#11 | 2009-12-31 ✅ Patent 8,429,382 granted on 2013-04-23Information handling system including a multiple compute element processor with distributed data on-ramp data-off ramp topology
#12 | 2009-12-17 ✅ Patent 8,495,574 granted on 2013-07-23Code coverage tool
#13 | 2009-08-06 ✅ Patent 7,770,140 granted on 2010-08-03Method and apparatus for evaluating integrated circuit design model performance using basic block vectors and fly-by vectors including microarchitecture dependent information
#14 | 2009-07-30 ✅ Patent 8,073,668 granted on 2011-12-06Method and apparatus for testing a full system integrated circuit design by statistical fault injection using hardware-based simulation
#15 | 2009-07-30METHOD AND APPARATUS FOR INCREASING THREAD PRIORITY IN RESPONSE TO FLUSH INFORMATION IN A MULTI-THREADED PROCESSOR OF AN INFORMATION HANDLING SYSTEM
#16 | 2009-07-30 ✅ Patent 8,255,669 granted on 2012-08-28Method and apparatus for thread priority control in a multi-threaded processor based upon branch issue information including branch confidence information
#17 | 2009-07-16 ✅ Patent 7,844,928 granted on 2010-11-30Method and apparatus for evaluating integrated circuit design performance using enhanced basic block vectors that include data dependent information
#18 | 2009-07-09 ✅ Patent 7,925,853 granted on 2011-04-12Method and apparatus for controlling memory array gating when a processor executes a low confidence branch instruction in an information handling system
#19 | 2009-06-11 ✅ Patent 8,006,070 granted on 2011-08-23Method and apparatus for inhibiting fetch throttling when a processor encounters a low confidence branch instruction in an information handling system
#20 | 2009-04-30 ✅ Patent 8,108,618 granted on 2012-01-31Method and apparatus for maintaining memory data integrity in an information handling system using cache coherency protocols
#21 | 2009-04-30 ✅ Patent 7,646,177 granted on 2010-01-12Design structure for a duty cycle measurement apparatus that operates in a calibration mode and a test mode
#22 | 2009-03-05Method and Apparatus for Evaluating the Timing Effects of Logic Block Location Changes in Integrated Circuit Design
#23 | 2009-03-05 ✅ Patent 7,818,619 granted on 2010-10-19Method and apparatus for debugging application software in information handling systems over a memory mapping I/O bus
#24 | 2009-03-05 ✅ Patent 7,831,812 granted on 2010-11-09Method and apparatus for operating an age queue for memory request operations in a processor of an information handling system
#25 | 2009-03-05Method and Apparatus for Providing an Electronic Calendar with an Indication of Timeslot Availability Dependent on the Importance of a Requester
#26 | 2009-02-26 ✅ Patent 8,073,669 granted on 2011-12-06Method and apparatus for detecting clock gating opportunities in a pipelined electronic circuit design
#27 | 2009-02-26Method and Apparatus for Fibre Channel Over Ethernet Data Packet Translation Via Look up Table Conversion Bridge in a Network System
#28 | 2009-02-26 ✅ Patent 8,310,953 granted on 2012-11-13Method and apparatus for enabling an adapter in a network device to discover the name of another adapter of another network device in a network system
#29 | 2009-02-26 ✅ Patent 8,396,009 granted on 2013-03-12Method and apparatus for an adapter in a network device to discover its adapter name in a network system
#30 | 2009-01-29 ✅ Patent 7,818,550 granted on 2010-10-19Method and apparatus for dynamically fusing instructions at execution time in a processor of an information handling system
#31 | 2009-01-15 ✅ Patent 8,010,656 granted on 2011-08-30Method and apparatus for dynamically granting or denying access to an electronic calendar
#32 | 2009-01-15 ✅ Patent 8,244,568 granted on 2012-08-14Method and apparatus for gathering participant free time to schedule events on an electronic calendar
#33 | 2008-12-11 ✅ Patent 8,677,101 granted on 2014-03-18Method and apparatus for cooperative software multitasking in a processor system with a partitioned register file
#34 | 2008-11-27 ✅ Patent 8,832,416 granted on 2014-09-09Method and apparatus for instruction completion stall identification in an information handling system
#35 | 2008-10-16 ✅ Patent 7,627,742 granted on 2009-12-01Method and apparatus for conserving power by throttling instruction fetching when a processor encounters low confidence branches in an information handling system
#36 | 2008-10-16 ✅ Patent 7,750,511 granted on 2010-07-06Method and apparatus for self-contained automatic decoupling capacitor switch-out in integrated circuits
#37 | 2008-09-25Method and Apparatus for Repairing a Processor Core During Run Time in a Multi-Processor Data Processing System
#38 | 2008-09-25 ✅ Patent 7,883,029 granted on 2011-02-08Irrigation system and methodology
#39 | 2008-08-14Method and Apparatus for Changing Software Components in an Information Handling System
#40 | 2008-08-14 ✅ Patent 7,737,763 granted on 2010-06-15Virtual electronic fuse apparatus and methodology
#41 | 2008-08-14 ✅ Patent 7,515,498 granted on 2009-04-07Electronic fuse apparatus and methodology including addressable virtual electronic fuses
#42 | 2008-08-07 ✅ Patent 7,962,911 granted on 2011-06-14Method and apparatus for preventing undesired termination of a process in an information handling system
#43 | 2008-08-07 ✅ Patent 8,407,451 granted on 2013-03-26Method and apparatus for enabling resource allocation identification at the instruction level in a processor system
#44 | 2008-07-31 ✅ Patent 8,055,761 granted on 2011-11-08Method and apparatus for providing transparent network connectivity
#45 | 2008-07-24 ✅ Patent 7,617,059 granted on 2009-11-10Method and apparatus for measuring the duty cycle of a digital signal
#46 | 2008-07-10 ✅ Patent 7,793,125 granted on 2010-09-07Method and apparatus for power throttling a processor in an information handling system
#47 | 2008-06-19METHOD AND APPARATUS FOR INTERFACING TO AN INTEGRATED CIRCUIT THAT EMPLOYS MULTIPLE INTERFACES
#48 | 2008-05-01 ✅ Patent 7,486,096 granted on 2009-02-03Method and apparatus for testing to determine minimum operating voltages in electronic devices
#49 | 2008-04-17 ✅ Patent 7,493,456 granted on 2009-02-17Memory queue with supplemental locations for consecutive addresses
#50 | 2008-02-07 ✅ Patent 8,201,159 granted on 2012-06-12Method and apparatus for generating data parallel select operations in a pervasively data parallel system
#51 | 2008-02-07 ✅ Patent 8,196,127 granted on 2012-06-05Pervasively data parallel information handling system and methodology for generating data parallel select operations
#52 | 2008-01-31 ✅ Patent 7,650,555 granted on 2010-01-19Method and apparatus for characterizing components of a device under test using on-chip trace logic analyzer
#53 | 2008-01-31 ✅ Patent 7,584,369 granted on 2009-09-01Method and apparatus for monitoring and controlling heat generation in a multi-core processor
#54 | 2008-01-31 ✅ Patent 7,617,403 granted on 2009-11-10Method and apparatus for controlling heat generation in a multi-core processor
#55 | 2008-01-17 ✅ Patent 7,423,921 granted on 2008-09-09Method and apparatus for wordline redundancy control of memory in an information handling system
#56 | 2007-11-22 ✅ Patent 7,363,178 granted on 2008-04-22Method and apparatus for measuring the relative duty cycle of a clock signal
#57 | 2007-11-22 ✅ Patent 7,333,905 granted on 2008-02-19Method and apparatus for measuring the duty cycle of a digital signal
#58 | 2007-11-15 ✅ Patent 7,595,675 granted on 2009-09-29Duty cycle measurement method and apparatus that operates in a calibration mode and a test mode
#59 | 2007-11-01 ✅ Patent 7,420,400 granted on 2008-09-02Method and apparatus for on-chip duty cycle measurement
#60 | 2007-11-01 ✅ Patent 7,330,061 granted on 2008-02-12Method and apparatus for correcting the duty cycle of a digital signal
#61 | 2007-10-18 ✅ Patent 7,849,241 granted on 2010-12-07Memory compression method and apparatus for heterogeneous processor architectures in an information handling system
#62 | 2007-08-23Method and apparatus for issuing instructions from an issue queue including a main issue queue array and an auxiliary issue queue array in an information handling system
#63 | 2007-07-26Method and apparatus for processing error information and injecting errors in a processor system
#64 | 2007-07-26 ✅ Patent 7,444,534 granted on 2008-10-28Method and apparatus for dividing a digital signal by X.5 in an information handling system
#65 | 2007-07-26Method and apparatus for information management and collaborative design
#66 | 2007-04-12Processor with efficient shift/rotate instruction execution
#67 | 2007-03-29 ✅ Patent 7,350,056 granted on 2008-03-25Method and apparatus for issuing instructions from an issue queue in an information handling system
#68 | 2007-03-29 ✅ Patent 7,590,194 granted on 2009-09-15Information handling system capable of detecting frequency lock of signals downstream from a signal synthesized by frequency synthesizer
#69 | 2007-03-29 ✅ Patent 7,620,126 granted on 2009-11-17Method and apparatus for detecting frequency lock in a system including a frequency synthesizer
#70 | 2007-03-15Input device for providing position information to information handling systems
#71 | 2006-11-02Method and apparatus for reducing time delay through static bitlines of a static memory
#72 | 2006-10-19Method and apparatus for highly secure communication
#73 | 2006-10-19Method and apparatus employing stress detection for highly secure communication
#74 | 2006-08-24 ✅ Patent 7,587,596 granted on 2009-09-08Method and apparatus for updating information stored in multiple information handling systems
#75 | 2006-08-24Method and apparatus for forwarding user information among multiple information handling systems
#76 | 2006-08-24Method and apparatus for restricting instant messaging during a scheduled event
#77 | 2006-07-13Method and apparatus for preventing unauthorized access to data
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