KFAR SABA
Israel
46
2023-04-06
The entities that hold a legal rights for patent applications filed by inventor MURIN MARK:
MARK MURIN from KFAR SABA, IL has applied for patents for these inventions. The list has both pending applications and granted patents:
Storage system and method for program reordering to mitigate program disturbs
#2 | 2022-06-28Time division peak power management for non-volatile storage
#3 | 2021-12-30Peak power reduction management in non-volatile storage by delaying start times operations
#4 | 2018-10-25Event-driven schemes for determining suspend/resume periods
#5 | 2017-07-11Self-detecting a heating event to non-volatile storage
#6 | 2015-06-04Batch command techniques for a data storage device
#7 | 2015-04-30Power drop protection for a data storage device
#8 | 2014-11-18Power drop protection for a data storage device
#9 | 2013-04-18AD HOC flash memory reference cells
#10 | 2013-03-14Method for efficient storage of metadata in flash memory
#11 | 2011-09-22Method for Recovering From Errors in Flash Memory
#12 | 2011-01-20Method for adaptive setting of state voltage levels in non-volatile memory
#13 | 2010-10-28Method and apparatus for implementing a caching policy for non-volatile memory
#14 | 2010-10-28Flash memory storage system and method
#15 | 2010-10-07Method for implementing error-correction codes in non-volatile memory
#16 | 2010-08-05Method, system and computer-readable code to test flash memory
#17 | 2010-01-07Probabilistic error correction in multi-bit-per-cell flash memory
#18 | 2010-01-07Probabilistic error correction in multi-bit-per-cell flash memory
#19 | 2009-12-31Probabilistic error correction in multi-bit-per-cell flash memory
#20 | 2009-12-24Ad hoc flash memory reference cells
#21 | 2009-12-03Increasing read throughput in non-volatile memory
#22 | 2009-10-29Non-volatile memory with adaptive setting of state voltage levels
#23 | 2009-10-29Method for adaptive setting of state voltage levels in non-volatile memory
#24 | 2009-08-27Probabilistic error correction in multi-bit-per-cell flash memory
#25 | 2009-07-16Probabilistic error correction in multi-bit-per-cell flash memory
#26 | 2009-07-02Error correction in copy back memory operations
#27 | 2009-07-02Method for generating soft bits in flash memories
#28 | 2009-05-28Operation sequence and commands for measuring threshold voltage distribution in memory
#29 | 2009-04-30States encoding in multi-bit flash cells for optimizing error rate
#30 | 2009-03-12Method of error correction in MBC flash memory
#31 | 2008-10-30Method for efficient storage of metadata in flash memory
#32 | 2008-10-23Programming a NAND flash memory with reduced program disturb
#33 | 2008-01-03Multi-bit-per-cell flash memory device with an extended set of commands
#34 | 2007-10-11Method for generating soft bits in flash memories
#35 | 2007-08-02Method of arranging data in a multi-level cell memory device
#36 | 2007-07-19Method for implementing error-correction codes in flash memory
#37 | 2007-05-17Flash memory device and method
#38 | 2007-05-10Device and method for monitoring operation of a flash memory
#39 | 2007-04-26Method for recovering from errors in flash memory
#40 | 2007-04-19Method of error correction in MBC flash memory
#41 | 2007-04-19Probabilistic error correction in multi-bit-per-cell flash memory
#42 | 2007-03-15Flash memory storage system and method
#43 | 2006-09-28Method, system and computer-readable code for testing of flash memory
#44 | 2006-07-13Method of managing a multi-bit cell flash memory with improved reliablility and performance
#45 | 2006-06-22Method of handling limitations on the order of writing to a non-volatile memory
#46 | 2006-05-11States encoding in multi-bit flash cells for optimizing error rate
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