Phoenix, Arizona
United States
23
2025-07-10
The entities that hold a legal rights for patent applications filed by inventor Viswanath Ram:
Ram Viswanath from Phoenix, US has applied for patents for these inventions. The list has both pending applications and granted patents:
MICROELECTRONIC COMPONENT HAVING MOLDED REGIONS WITH THROUGH-MOLD VIAS
#2 | 2025-02-27MICROELECTRONIC COMPONENT HAVING MOLDED REGIONS WITH THROUGH-MOLD VIAS
#3 | 2025-01-02METHODS OF FORMING WAFER LEVEL MULTI-DIE SYSTEM FABRIC INTERCONNECT STRUCTURES
#4 | 2024-10-17PITCH TRANSLATION ARCHITECTURE FOR SEMICONDUCTOR PACKAGE INCLUDING EMBEDDED INTERCONNECT BRIDGE
#5 | 2024-04-25IC die and heat spreaders with solderable thermal interface structures for multi-chip assemblies including solder array thermal interconnects
#6 | 2024-01-25Microelectronic component having molded regions with through-mold vias
#7 | 2023-09-14Pitch translation architecture for semiconductor package including embedded interconnect bridge
#8 | 2023-05-04Microelectronic component having molded regions with through-mold vias
#9 | 2022-06-09Microelectronic component having molded regions with through-mold vias
#10 | 2022-05-12Pitch translation architecture for semiconductor package including embedded interconnect bridge
#11 | 2021-09-30Microelectronic component having molded regions with through-mold vias
#12 | 2021-09-30IC die and heat spreaders with solderable thermal interface structures for assemblies including solder array thermal interconnects
#13 | 2021-09-30IC die and heat spreaders with solderable thermal interface structures for multi-chip assemblies including solder array thermal interconnects
#14 | 2021-09-30IC die with solderable thermal interface structures for assemblies including solder array thermal interconnects
#15 | 2020-08-27Coupled cooling fins in ultra-small systems
#16 | 2020-07-23Pitch translation architecture for semiconductor package including embedded interconnect bridge
#17 | 2020-07-16Thermal management solutions for integrated circuit packages
#18 | 2019-07-04Pitch translation architecture for semiconductor package including embedded interconnect bridge
#19 | 2019-04-04INTEGRATED EMBEDDED SUBSTRATE AND SOCKET
#20 | 2016-02-11Electronic package with narrow-factor via including finish layer
#21 | 2014-09-18Chip package connector assembly
#22 | 2005-04-21Laminated socket contacts
#23 | 2005-02-15Laminated socket contacts
1443033 ⎘